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Emulation Engineer Key Responsibilities:- Develop and execute C/C++/System tests on HDL-HVL co-emulation platforms- Work on IO bus protocols such as I2C, SPI, USB, and PCIe- Debug complex SoC systems using tools like JTAG and Trace32 Preferred Skills:- Knowledge of ASIC design &amp; prototyping flows- Proficiency in SystemC / C / C++ / UVM / System Verilog- Exposure to domains like PCIe, Flash, Memory, CPU, GPU, DRAM- Experience with Emulation Toolchains such as Zebu,Veloce, Palladium–Experience 4-12 Years Share your updated resume now.

eInfochips ( An Arrow Company )

Embedded Systems Engineer

Verification EngineerThe Verification Engineer will be responsible for ensuring the quality and reliability of hardware and network systems. They will work closely with the engineering team to develop and execute verification plans, analyze test results, and identify and resolve any issues. The role requires strong problem-solving skills, attention to detail, and the ability to work effectively in a team environment.

Testing Engineer

SoC Design Engineer Job Descriptions &amp; RequirementsThis person will be part of the next generation Design team. Requires strong hands-on knowledge of all facets of the SOC design process and good understanding of SOC Architecture. Key Responsibilities:• Strong knowledge in IP/SOC design methodologies.•Sound knowledge of RTL/SOC design/integration with Verilog/system Verilog• Strong experience in Synthesis, timing, full chip netlist &amp; front-end design tools&amp; flows Low power design• Mentoring juniors and enhancing their skill set• Must have strong knowledge of AMBA AHB/AXI protocol• Working knowledge on code coverage, functional coverage, Lint, CDC etc• IP development and coding using standard coding guide lines knowledge• Excellent communication skills. Must be able to participate &amp; lead in global meetings• Soft skills to be able to work in a cross functional international team digital and software design engineers Preferred Experience:• 4-10 years of RTL design, ArchitectureSOC implementation experience:• Ability to work well in a dynamic, fast-paced, pressure filled environment.

Modernize Chip Solutions

DFT Design Engineer - Foundry Team As one of the largest R&amp;D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.&nbsp; Roles and Responsibilities5+ years of experience in full chip DFT architecture, implementation, timing closure and post silicon validation. Expertise required in the following areas:<ul><li>Scan architecture planning, pin mixing and scan compression planning, optimization for pattern volume for SA and TD pattern sets, scan synthesis, power optimization techniques in test modes</li><li>MBIST architecture planning, repair architectures, insertion, verification</li><li>Analog and mixed signal IP testing architecture and verification including IPs such as PLLs, PHYs</li><li>Timing closure of scan, MBIST and other test modes, writing SDCs, understanding of timing exceptions wherever required, debugging timing issues with PD team</li><li>Timing GLS, debug of fails in simulations</li><li>Post silicon validation, interpretation of tester results, debugging IR drop issues, diagnostics of silicon failures</li><li>Understanding of JTAG operation and debug required. Understanding of iJTAG protocol desirable</li><li>Understanding of functional test cases, IO testing, testing of ARM processor cores</li><li>Ability to lead a team across all aspects of DFT, interact with RTL, physical design teams for DFT implementation, anticipate risks, plan project timelines and milestones</li></ul> Experience – 5+ Years Qualifications<ul><li>B.Tech/B.E/M.Tech/M.E</li></ul>

Samsung India Electronics Pvt Ltd 

Electronic Engineer

Tech Lead-NX Customization <ul><li>Experience - 8+ Years</li><li>Skills set - NX Customization NXAPI with C++&nbsp;</li></ul> Share your updated resume now.

Neilsoft Ltd

Automation Integration Engineer

Memory Layout Expert Experience: 5+ yearsAvailability: Immediate to 30 days joiners preferred! Share your updated resume now.

Tessolve Semiconductor Pvt Ltd

Computer Engineer

BSP Developer Key Skills:&nbsp;◾ BSP (Board Support Package) Development&nbsp;◾ Embedded Systems Programming&nbsp;◾ Diag, USB, Storage, PMIC&nbsp;◾ Expertise in Clock Management, Buses &amp; Peripherals&nbsp;◾ Strong Knowledge of Memory Management in Embedded Systems Experience: 3 – 5 Years Share your updated resume now.

MosChip Technology Ltd

Developer

Design Verification Engineer What We’re Looking For:<ul><li> Strong DV knowledge with C and System Verilog test development exposure</li><li> Experience with Gate Level Simulations</li><li> Hands-on with ARM-based SoCs</li><li> Knowledge of Power Aware Verification (UPF based RTL simulation)</li><li>Experience: 4–5 Years</li></ul> Share your updated resume now.

Digicomm Semiconductor

Assistant Design Engineer

Platform Board Engineer <ul><li>Lab&nbsp;Support&nbsp;Engineer who&nbsp;can take&nbsp;care&nbsp;of&nbsp;inventory.&nbsp;Need&nbsp;to&nbsp;have basic&nbsp;knowledge&nbsp;of&nbsp;hardware.</li><li>Experience: 5+ Years</li><li>Notice Period: Immediate&nbsp;</li><li>Interview mode: F2F</li></ul> Share your updated resume now.

ACL Digital

Programmer

Lead Design Verification Expert Skills:• System Verilog, UVM, SVA • MAC Protocol (Must) • SOC/ASIC/IP verification • PCIe, DDR, USB, DFT awareness, and leadership/mentoring. Experience: 5+ years (7+ preferred) Share your updated resume now.

Teamcenter/PLM ArchitectWe are seeking a highly skilled Senior Software Engineer with a strong background in Product Lifecycle Management (PLM) systems and cloud-based solutions. The ideal candidate will have extensive experience with Java/Spring Boot, microservices architecture, and cloud platforms, particularly Google Cloud Platform (GCP). Proficiency in NOSQLDB is also required.Strong knowledge in PLM Teamcenter Architecture, Customization (ITK, SOA, RAC and AWC) and configurations. Design and build scalable microservices using Java/Spring Boot.Leverage Google Cloud Platform (GCP) to deploy, manage, and optimize cloud-based applications.Utilize MongoDB for data storage, ensuring optimal performance and reliability.Collaborate with cross-functional teams to integrate PLM systems with other enterprise applications.Participate in the full software development lifecycle, including requirements gathering, design, development, testing, and deployment.Troubleshoot and resolve technical issues, providing timely and effective solutions.Strong knowledge in PLM Teamcenter Architecture, Customization (ITK, SOA, RAC and AWC) and configurations. Design and build scalable microservices using Java/Spring Boot.Leverage Google Cloud Platform (GCP) to deploy, manage, and optimize cloud-based applications.Utilize MongoDB for data storage, ensuring optimal performance and reliability.Collaborate with cross-functional teams to integrate PLM systems with other enterprise applications.Participate in the full software development lifecycle, including requirements gathering, design, development, testing, and deployment.Troubleshoot and resolve technical issues, providing timely and effective solutions.<h4>Experience Level</h4>Senior Level

Ford Motor

Senior Software Engineer

Analog Layout Engineer What We’re Looking For:<ul><li> Strong experience in analog layout design</li><li> Exposure to lower technology nodes (preferred)</li><li> Experience with tools like Virtuoso and Calibre</li><li> Good understanding of matching, shielding, and parasitic optimization techniques</li></ul> <ul><li>Experience: 4 to 10+ Years</li><li>Notice Period: Immediate to 30 Days</li></ul> Share your updated resume now.

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