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ISR Training EngineerISR Training Engineer - HyderabadResponsibilities &amp; Accountabilities: The ISR Training Engineer is responsible of QCD commitment on his scope of work: During the tender phase: - Identify the Customer’s training requirements and needs - Participate to the ISR training offer - Prepare a draft ISR training management plan for Bids - Participate to the clause by clause and another offer’s documentation. During the Project phase: - Manage the interfaces/deliverables with ISR WP manager (Training plan, dates, location, …) - Prepare/verify the training documentation - Organize the training sessions: booking of trainers, training room, travels, accommodations, training materials and documentation - Perform the training courses for customer operations and maintenance staff at different locations - Evaluate the customer satisfaction to the training sessions, - REX: Capitalize and manage data &amp; REX to improve QCD target and reducing the technical risks - Follow-up training activities through the relevant KPIs Documentation Support: Create/revise maintenance manuals such as IPC, Maintenance manual, operation manual, etcInterfaces with Rolling Stock project manager, participating units’ representative, components sub-contractors, and engineering sub-contractors under the responsibility of the training manager. Educational Requirements: Mandatory: Engineering University Degree Desirable: Training specialization. Experience: Mandatory: 5-6 years of Training experience within Train Operator Training scope and Railways technical knowledge on operation and maintainability aspects Desirable: Experience in a Maintenance Contract. Competencies &amp; Skills: Mandatory: English Fluency Desirable: Team Leader and Knowledge of the main ISR Elements applicable to Railways equipment (Technical Publishing, Training)Alstom is the leading company in the mobility sector, solving the most interesting challenges for tomorrow’s mobility. That’s why we value inquisitive and innovative people who are passionate about working together to reinvent mobility, making it smarter and more sustainable. Day after day, we are building an agile, inclusive and responsible culture, where a diverse group of people are offered opportunities to learn, grow and advance in their careers, with options across functions and geographic locations. Are you ready to join a truly international community of great people on a challenging journey with a tangible impact and purpose?   Equal opportunity statement: Alstom is an equal opportunity employer committed to creating an inclusive working environment where all our employees are encouraged to reach their full potential, and individual differences are valued and respected.  All qualified applicants are considered for employment without regard to race, colour, religion, gender, sexual orientation, gender identity, age, national origin, disability status, or any other characteristic protected by local law.  <h4>Experience Level</h4>Senior Level

Alstom Transport India Ltd

Corporate Trainer

BIM Coordinator, PMO, REC<h4>Company Description</h4>Ramboll in IndiaRamboll has more than 1,000 experts working across five offices in India applying their passion to deliver innovative solutions in markets as diverse as Buildings, Transport, Planning &amp; Urban Design, Water, Environment &amp; Health and Energy. Founded in Denmark, Ramboll is a people company. We invite you to contribute to a sustainable future working in an open, collaborative and empowering culture.<h4>Job Description</h4>As our new BIM Coordinator, you will be part of a world class, innovation driven Engineering Design Centre owned by an independent trust and its employees. REC is a highly sophisticated centre of engineering excellence and based in our India Head Office in Gurgaon. Working in partnership with all our established offices globally, the Ramboll Engineering Centre (REC) is a Centre for excellence in design by offering optimized solutions to the rest of the organization.Your key tasks and responsibilities will be:<ul><li>Ensure that we work according to digital requirements and follow our digital processes.</li><li>Coordinate with the project members.</li><li>Managing the project's digital requirements.</li><li>Working according to our Digital Delivery Plan (BIM Execution Plan).</li><li>Quality-assuring our digital processes.</li><li>Assisting the BIM strategist in driving the project forward with a focus on efficient information management.</li><li>Supporting the project's various discipline model coordinators.</li><li>Responsible for the project's digital and data/metadata requirements, including project and client data and CAD needs.</li><li>Collaborate with project managers and control the exchange of information and deliverables on issues related to digital design.</li><li>Ensure and monitor digital information delivery and control, with a focus on metadata.</li><li>Provide answers to technical/data questions and, if necessary, communicate these answers to the project team.</li><li>Understand skills and training needs of team members and communicate the same to the Department Manager/Team Lead.</li></ul><h4>Qualifications</h4><ul><li>BE/B. Tech degree in Engineering from an institute of repute or equivalent</li><li>Experience required 4 to 10 Years</li><li>Should have experience in Infrastructure/Transport market</li><li>Should have proficiency in one or more softwares such as AutoCAD Civil 3D, Microstation, Infraworks, NavisWorks</li><li>Should have knowledge in shared project software e.g., Filery/ Projectwise/ BIM360/ Autodesk Construction Cloud (ACC)/ Chaos/ Server/ Folder structure/Chaos Desktop and Client DMS.</li><li>Should have previous experience of data coordination for complex and multidisciplinary projects</li><li>In addition to technical / functional acumen, candidate should have good communication skills and should be able to present their work</li><li>Should be a good team member and should coordinate with other team members and the project manager for timely delivery of project</li><li>Professional English language skills (written and verbal).</li></ul><h4>Additional Information</h4>Welcome to our Buildings divisionRamboll is among the top 10 building designers in the world. Annually, we work on more than 10,000 building projects, and we combine local insights with a global network of bright minds with specialist expertise. Together, we challenge assumptions in the interest of creating more practical, sustainable and economic building designs.Ramboll in IndiaRamboll has more than 1,000 experts working across five offices in India applying their passion to deliver innovative solutions in markets as diverse as Buildings, Transport, Planning &amp; Urban Design, Water, Environment &amp; Health and Energy. Founded in Denmark, Ramboll is a people company. We invite you to contribute to a sustainable future working in an open, collaborative and empowering culture.How to applyApply online. Attach your CV, cover letter and relevant documents showcasing why you are the right fit for the role, and when you are available to start. We look forward to receiving your application.Deadline.<h4>Experience Level</h4>Executive Level

Ramboll India Pvt Ltd

Senior Architect

Technical Lead-Application Engg Services<h4>Area(s) of responsibility</h4>Job Title: Senior PDM/PLM Systems Engineer – CAD &amp; Quality Integration (2 Numbers)SummaryWe are seeking a Senior PDM/PLM Systems Engineer with 5+ years of experience in managing enterprise Product Data Management (PDM) and Product Lifecycle Management (PLM) platforms, CAD-PLM integrations, and engineering tool administration. This role involves overseeing multi-application environments, ensuring license compliance, maintaining infrastructure readiness, and enabling seamless collaboration between design, quality, and safety engineering teams.Key Responsibilities<ul type="disc"><li>Administer and maintain PDXpert PLM CAD Management (12.2.1230.4) for product data governance, version control, and workflow automation.</li><li>Manage Autodesk Vault and multiple SolidWorks PDM environments including:</li><ul type="circle"><li>SolidWorks – PCAS &amp; PCAS Electrical</li><li>SolidWorks 2018 Professional ePDM</li><li>SolidWorks Mechanical PDM – Battery</li><li>SolidWorks Mechanical PDM – EDI &amp; BRAMMO</li></ul><li>Oversee QCBD (Quality Collaboration By Design) for quality process tracking and compliance documentation.</li><li>Support IAR Embedded Workbench (8.22.2.15996) for embedded systems development environments.</li></ul><h4>Experience Level</h4>Senior Level

Birlasoft Limited

Senior Application Engineer

Lead Engineer – 3GPP What you work:<ul><li>As a technical member, you will contribute in product development and delivery including planning, requirement analysis in wireless communication.&nbsp;</li><li>Analyze and prioritize various features for different sub-systems to get a synchronized system delivery in a phased manner&nbsp;</li><li>Will be looking after product simulation and other research-oriented functions&nbsp;</li><li>As a lead engineer, you will be responsible for leading a team and guiding them for optimum output.&nbsp;</li></ul> Mandatory skills:&nbsp;<ul><li>MTech/MS/PhDs from ECE/EE/CSE&nbsp;</li><li>Have made contribution to 3GPP CT&nbsp;</li><li>Have worked with MATLAB and/or Python simulation&nbsp;</li><li>Worked in 3GPP Release 17, 18 and attended 3GPP meetings&nbsp;&nbsp;</li><li>Thesis or present area of work in Rel 19 topics of CT#3, CT#4,SA#2&nbsp;</li></ul> Desired skills:&nbsp;<ul><li>Worked with any of the simulation tools.&nbsp;</li><li>Strong knowledge in wireless communication&nbsp;</li><li>Should be willing to travel Twice per quarter nationally/internationally&nbsp;&nbsp;</li><li>Mandatory to have done basic wireless communication, Computer&nbsp;</li></ul> Preferred Qualifications:&nbsp;<ul><li>Experience:&nbsp;6 to 9 years’ experience from Telecommunication background.&nbsp;</li><li>Education:&nbsp;MTech/MS/PhDs from ECE/EE/CSE</li></ul>

Tejas Networks Ltd

Sales Engineer

ASIC Physical Design Tools Flows & Methodology Lead THE ROLE:&nbsp;As a Silicon Design Engineer in the AMD AECG ASIC TFM (tools Flows Methodology) team, you will work with design experts (FE and BE) to come up with the best implementation methodologies/flows and work on development and support of the FE/BE flows.&nbsp;KEY RESPONSIBILITIES:&nbsp;<ul><li>Define and drive key Frontend/Beckend/Physical Design methodologies.</li><li>Partner with AMD CAD Teams, Design team, physical design teams to ensure seamless end to end design flows.</li><li>Work with existing development teams to define roadmaps for existing flows and assist in difficult technical debug.</li><li>Work closely with design teams to gather requirements and develop strategies to tackle key technical problems.</li><li>Work on Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC &amp; LVS), Crosstalk Analysis, EM/IR</li><li>Handling different PNR tools - Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk</li></ul>&nbsp;PREFERRED EXPERIENCE:&nbsp;<ul><li>8+ years of professional experience in physical design, preferably with high performance designs.</li><li>Experience in automated synthesis and timing driven place and route of RTL blocks for high speed datapath and control logic applications.</li><li>Experience in automated design flows for clock tree synthesis, clock and power gating techniques, scan stitching, design optimization for improved timing/power/area, and design cycle time reduction.</li><li>Experience in floorplanning, establishing design methodology, IP integration, checks for logic equivalence, physical/timing/electrical quality, and final signoff for large IP delivery</li><li>Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality, familiarity with tools for schematics, layout, and circuit/logic simulation</li><li>Versatility with scripts to automate design flow.</li><li>Strong communication skills, ability to multi-task across projects, and work with geographically spread out teams</li><li>Excellent physical design and timing background.</li><li>Strong analytical/problem solving skills and pronounced attention to details.</li></ul>

Amd India Private Limited

Embedded Software Developer

Post Silicon Validation (PSV) Engineer Key Responsibilities:<ul><li> Execute PVT validation (Process, Voltage, Temperature) on GPU/SoC platforms across multiple test conditions</li><li> Run tests for boot flows, functional stability, and interface behavior</li><li> Analyze boot/serial logs and debug system-level issues</li><li> Work hands-on with lab instruments — oscilloscopes, multimeters, power analyzers</li><li> Develop or enhance Python-based automation scripts for validation &amp; reporting</li><li> Handle board-level activities like flashing, BIOS/FW config, and chamber setup</li></ul> Bonus Skills:<ul><li> Exposure to ARM-based SoCs</li><li> Familiarity with USB, PCIe, I2C, SPI interfaces</li><li> Experience with Jenkins/test farms and validation dashboards</li><li> Understanding of thermal profiling &amp; voltage scaling</li></ul> <ul><li>Experience: ~3 Years</li><li>Qualification: BE/BTech in Electronics / Electrical / Computer Engineering</li></ul> Share your updated resume now.

Digicomm Semiconductor

Testing Engineer

Embedded Windows Driver Developer SKILL SET• 4+ years in Windows driver development, preferably with AMD or similar x86 platforms.• Strong experience in Windows networking driver development.• Experience in Windows kernel-mode driver development (WDM, KMDF, UMDF). • Proficiency in C/C++ and debugging tools (WinDbg, TraceView).• Experience in analyzing and debugging kernel crash dumps (WinDBG).• Familiarity with PCle enumeration, device ID handling, and WHQL certification processes. • Experience with Ethernet MAC/PHY integration and redriver configuration. Experience - 4-10 years Share your updated resume now.

Scaledge

Embedded Systems Engineer

Optical Networks Integration Architect We're hiring Optical Networks Integration Architect Experience Required: 8–12 Years Key Skills &amp; Expertise<ul><li>EMS/NMS &amp; FCAPS in 4G/5G Optical Networks</li><li>DWDM/OTN configuration, mapping, cross-connects, protection/restoration</li><li>SNMP, Netconf, RESTAPI, CLI, XML/JSON, TMF</li><li>Python, Perl, C Programming | Linux/Unix</li><li>Kafka, Docker, Kubernetes, Helm</li><li>Tools: JDSU/SPIRENT, COM5, Arcsight, GitHub, JIRA</li><li>Integration with Huawei, Cisco, Juniper, Extreme Networks</li></ul> Optical Domain Knowledge<ul><li>OTN Mapping: Ethernet over OTN, ODU frames</li><li>Cross-Connects: OXC, digital switching</li><li>Performance Monitoring: Fault detection, latency tracking</li><li>DWDM Design: Channel spacing, transponder selection</li><li>Optical Components: Amplifiers (EDFA/Raman), ROADMs</li><li>Channel Provisioning: Laser power, attenuation, OTDR validation</li><li>Reference Guides: Cisco ONS 15454, Huawei NE40E</li></ul> Responsibilities<ul><li>Design &amp; develop Optical NMS integration architecture</li><li>Configure &amp; validate DWDM/OTN components</li><li>Automate deployment using Kubernetes, Helm, Docker</li><li>Conduct interoperability &amp; system testing</li><li>Collaborate with cross-functional teams (Transport/RAN, Cloud, DevOps)</li><li>Provide support during live deployments &amp; field trials</li><li>Create release documentation (MOP, ATP, Configuration Guide)</li></ul> Work on cutting-edge telecom infrastructure, collaborate with top engineers, and shape the future of optical network automation.If interested, Reach out with CV.

Capgemini

Fiber Infrastructure Engineer

IP/SOC Verification Engineer We are hiring for experienced IP/SOC Verification Engineers with 5+ years in PCIe (Gen5, Gen6), DDR, and Ethernet protocols.If you have a passion for cutting-edge verification and want to be part of innovative projects, let’s connect! Share your updated resume now.

Sr. VLSI Design & Verification Engineer What we’re looking for: <ul><li> 5+ years of hands-on experience in RTL design or verification</li><li> Expertise in high-speed protocols (PCIe, USB, DDR, etc.)</li><li> Strong knowledge of SystemVerilog, UVM, and scripting languages</li><li> Experience with industry-standard EDA tools</li><li> Passion for innovation and problem-solving</li></ul> Share your updated resume now.

Tekla Framing Checker <ul><li>Experience: 7+ Years</li><li>Skills: AISC PEMB Framing</li><li>Software: Tekla Structures</li><li>5 Positions</li></ul> Share your resume now.

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