ASIC Design Performance Verification Engineer

ASIC Design Performance Verification Engineer, Silicon

Minimum qualifications:

• Bachelor's degree in electrical engineering, computer engineering, computer science, a related field, or equivalent practical experience.
• 4 years of experience with simulating digital logic at using SystemVerilog and UVM.
• Experience with debug tests with arch and design engineers to deliver functionally correct blocks and subsystems.

Preferred qualifications:

• Master's degree or PhD in electrical engineering, computer engineering, or computer science, with a focus on computer architecture.
• Experience with performance verification of SOCs, pre-silicon analysis, and post-silicon correlation.
• Experience with interconnect protocols (e.g., AHB, AXI, ACE, CHI, CCIX, CXL).

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a part of the Google Silicon Platforms team, you will work on the performance verification of key IPs in the mobile SOCs. You will collaborate with hardware architects and design engineers for defining performance metrics across different modes and use cases, and verify that the design is able to achieve the requirements within a given power envelope. You will be responsible for infrastructure IP, interconnects, caches, memory management, and system services.

The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world.

Responsibilities

• Verify designs using verification techniques and methodologies.
  
• Work cross-functionally to debug failures and verify the functional correctness of the design.
  
• Provide test plans, including verification strategy, environment, components, stimulus, checks, coverage, and ensure documentation is easy to use.
  

Experience Level

Mid Level