Memory Design Engineer

Memory Layout Design Engineer (SRAM/ROM)

Title:  Memory Layout Design Engineer (SRAM/ROM)

About GlobalFoundries

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Introduction

In this position you will be integrated in our Foundry IP Development team in Bangalore. In close collaboration with other disciplines across our worldwide engineering teams you will be developing layout for SRAM memory circuits, which enable our customers to perform product designs at highest quality standards based on GlobalFoundries' advanced process nodes.

Your Job:

• The development of product grade SRAM memory IP’s covering the following phases:

• Layout Design of SRAM Memory IPs

• Layout checks like LVS,DRC,DFM, EMIR

• Review of Layouts and extend help for other Layout teams

• Design Kit prep from layout side, verification and validation

• Layout automation and script support

• Being a good team-player taking key initiatives for productivity improvements and innovation

• Sign off and release into dedicated IP validation test chips

• Specification and documentation

• Support of the silicon bring up and characterization

Required Qualifications:

• Bachelor’s degree with 8+ years or master’s degree with 6+ years’ experience in semiconductors/Microelectronics/VLSI engineering.

• Practical experiences in Memory and Custom Mixed-signal layouts at one or several of the following areas:

• Memory Layout design and architecture concepts

• Experience in SRAM layouts and Testchip integration will be an added advantage

• Proficient in Basic concepts of matching, shielding, power optimization and track planning

• Proficient in handling EDA tools from Synopsis, Mentor and Cadence used for layout design like schematic/layout editor, parasitic extraction tools, DRC, LVS, DFM, EMIR, etc.

• Basic understanding of fabrication steps and flow.

• General analog mixed-signal design concepts

• Circuit design, Reliability analysis, Statistical analysis of circuits

Preferred Qualifications:

• Good knowledge of CMOS technology

• Hands on knowledge of state-of-the-art memory or analog layout flows

• Programming experience applicable to design flow automation tasks

• The capability to work within a very dynamic interdisciplinary environment

• as well as dedicated knowledge of 45/32/28nm and below technology nodes are an advantage.

• You are flexible, highly motivated and have a team-oriented working style.

• You have shown the ability to communicate as well as work efficiently in an international

• multi-disciplinary environment.

• Strong written and verbal communication skills in English are a must.

GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard.

As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.

All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

Information about our benefits you can find here: https://gf.com/about-us/careers/opportunities-asia

 

Experience Level

Senior Level