Post Silicon System Validation Engineer

Post SI System Validation engineer

Job Details:

Job Description: 

• This role requires regular onsite presence to fulfill essential job responsibilities. Defines, develops, and performs functional validation for integrated SoCs, focusing on validation of IP integration, interaction between IPs, and systemlevel features.
• Applies various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met.
• Reviews proposed design changes to assess impact on validation plans, tasks, and timelines. Develops SoC validation methodologies, validation test plans, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis.
• Performs silicon debug to identify root causes and resolves all functional and triage failures for SoC issues.
• Tests interactions between various SoC features using validation infrastructure. Develops postsilicon validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing. Publishes SoC validation reports summarizing all validation activities performed, reviews results, and communicates to relevant teams. Works with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for SoC interfaces and to meet desired product specifications.
• Develops content to create or increase specific IP interactions using a variety of tools and techniques (including patching techniques using microcode, firmware, or custom OS builds).
• Engages in all phases of the product life cycle and develops and validates content, infrastructure, and bug hunts in multiple environments (e.g., simulation, emulation, FPGAs) to ensure silicon readiness.

Qualifications:

• Bachelor's/Master's in Electrical/Electronic Engineering or Computer Engineering or Computer Science with minimum 7 years to 12 years for System Validation of related work experience.
• Must have microarchitecture experience in CPU/SoC/Chipset
• Knowledge of IA/ARM core and system level Power Management architecture and flows, who familiar in Pcode and PMC features, Chip level power management transition states etc.
• Understanding of System Reset flows and Thermal related Validation expertise is a plus.
• Solid understanding of the Validation and Debug flows of a complex CPU Silicon:
• Knowledge on Validation/ Debug Flows and overall SOC Architecture.
• Pre-silicon Design / Validation knowledge is a value add.
• Good working knowledge in C++/Python SW programming for content development and scripting.
• Knowledge of Verilog/VHDL and EDA design tools and pre si validation methodology is a plus.
• Excellent written and oral communications and experience working in a cross functional team environment are essential
• Good Team player
• Strong problem solving, analytical and debug skills

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.