Senior Principal Application Engineer - Semiconductor Characterization

Principal Application Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

About the Team

The Liberate Team within Cadence’s Custom IC & PCB Group (CPG) enables customers to adopt and deploy industry‑leading Liberate Characterization Suite that power advanced semiconductor design flows. As a pre‑sales engineering group, we work at the intersection of technology, product strategy, and customer success—partnering with R&D, product engineering, sales, and strategic customers worldwide.

This is a high‑impact, dynamic, and technical role where you will help shape customer outcomes, influence new product capabilities, and represent Cadence in critical deployment engagements.

Role Overview

As a Principal Application Engineer, you will lead product evaluations, deliver deep technical guidance on characterization methodologies, and support customers working at cutting‑edge technology nodes. You will help translate customer requirements into product direction by collaborating closely with the R&D and product teams.

You will also play a key leadership role within the team by mentoring junior engineers, guiding them on technical problem‑solving, methodology, and best practices.

Key Responsibilities

• Lead technical evaluations, proofs‑of‑concept, and competitive positioning for the Liberate Characterization Suite.
• Work closely with R&D and product management to provide real‑world feedback and drive feature enhancements.
• Act as a trusted technical advisor to customers, helping them deploy advanced characterization and modeling flows.
• Debug complex customer issues and deliver actionable solutions.
• Mentor and guide junior team members, helping build internal expertise and technical depth.
• Deliver customer trainings, workshops, and technical presentations.
• Partner with Product, R&D and sales team to support business growth and strategic engagements.

Experience and Technical Skills Required

• 8–10 years of industry experience in library characterization, modeling, or semiconductor design.
• Proven ability to mentor, guide, and support junior engineers.
• Strong IP characterization background and deep Liberty modeling expertise.
• Thorough understanding of Liberty formats (NLDM, CCS, ECSM, LVF, EM, Aging, etc.).
• Hands‑on experience performing characterization using industry‑standard tools.
• Experience with industry‑standard circuit simulators (Spectre, HSPICE, etc.).
• Strong understanding of CMOS fundamentals, integrated circuit behavior, and advanced nodes (5nm, 3nm).
• Good knowledge of process variation, statistical characterization, and variation‑aware modeling.
• Strong problem‑solving skills for debugging customer issues.
• Experience with Cadence Liberate and Cadence Spectre is a plus.

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Experience Level

Senior Level