Senior Manager, VLSI Design Engineering

Company Description

Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.

Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.

Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.

Job Description

Job responsibilities:  

• 14 + Years of the relevant Verification work experience 

• Minimum 3-4 years’ experience of management 

• Experience in conducting effective Performance Management and Feedback sharing. 

• Able to lead IP/Sub-System/Fullchip Verification Team as Overall Project Functional Lead (PFL) 

• Study industry standard methodologies and quickly implement same in the team. 

• Create verification environment using UVM methodology. 

• Create reusable bus functional models, monitors, checkers and scoreboards. 

• Drive functional coverage driven verification closure. 

• Work with architects, designers, and post-silicon teams 

• Hands-on contributions to Testbench, Functional Coverage development like coding, porting and maintaining System Verilog Assertions 

• Debug failures and root-cause it by interacting with other teams/groups Etc. 

• Define and implement verification strategies, test plans, and methodologies, release flows for complex IP and Fullchip design. 

• Self-motivated , has strong analytical skills, creative thinking and provide leadership in building and managing the team  

Qualifications

Management Skills Required: 

• Lead and Manage Verification team 

• Drive automated verification infrastructure with state of the art  to improve efficiency and reliability. 

• Mentor and guide junior engineers, fostering a culture of innovation, collaboration and technical excellence. 

• Track project milestones, verification progress and report status to executives and stakeholders. 

• Experience with coordinating the Verification process across countries and multiple time-zones 

• Manage hiring, performance and retention 

- Software Skills Required: 

• Proficiency in Computer Science fundamentals – object-oriented design, data structures, algorithms, design, problem solving, and complexity analysis 

• Basic knowledge of with C, C++, SystemC, perl, python, tcl, shell is preferable  

 

- Functional Verification: 

• Unit/Sub-system/Fullchip level verification experience 

• Experience in leading verification closure of complex IP/Fullchip for at least one project 

• Exposure to industry standard verification tools for simulation and debug 

• RTL & Gate Level Simulations 

• Proficiency in Verilog, System Verilog, UVM & Assertions  

• Exposure to Verification Fundamentals  

• Verification Automation using scripts  like Perl,shell,tcl/tk 

• Good debugging and problem solving skills. 

• Good communication skills and ability, desire to work as a team player   

• Exposure to Analog verification will additional plus point 

 

-Digital design Concepts 

                -  CMOS VLSI, Digital Circuits 

                -  Knowledge on Memory (preferred) 

                  (SRAM/DRAM/ROM/Flash) Circuits/Logic 

             - Preferred exposure  

                                - NCSIM, Xcellium, IMC, IEV, Verdi, Jasper, VS Formal 

                                - Cadence Schematic and layout environment 

 

- Education: 

• B.E/B.Tech/M.Tech in ECE/VLSI/Electrical Engineering

Additional Information

Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.

Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs.accommodations@sandisk.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

 

Experience Level

Senior Level