Senior RTL Design Engineer

Experience: 7-12 Years

Job Descriptions & Requirements

We are seeking an individual should have strong technical experience in digital frontend design and Verification domains.

Additional responsibilities include:

• Work on serial and communication protocols

• Understand business priorities and break it down into technical tasks.

• Understand existing products at lower levels and identify enhancement opportunities/costs.

• Look ahead into future opportunities and help create a technical roadmap for the IP.

Requirement:

• BSEE/MSEE/PhD in Electrical and/or Computer Engineering.

• Experience with micro-architecture and design of digital IPs and subsystems

• Experience with Serdes designs and operation fundamentals.

• Knowledge of any of the protocols AXI, I2C, SPI, MIPI-CSI, and Video streaming Protocols etc. Mandatory Requirement:

Mandatory Requirement:

• Strong RTL design and coding experience in Verilog