System on Chip (SoC) Low Power Design Engineer

SoC AMS Low Power

Purpose: 

As a SoC Low Power design and implementation engineer in the SoC team in the semiconductor industry, the role includes working on the Soc level power analysis, power rollup, defining SoC power targets and implementation of power targets till tape-out and on silicon. The role also includes creating a SoC power rollup tool. As a collaboration partner working with Frontend and Backend teams to estimate power and enable methodologies to estimate, analyse and optimize power. This position involves technical expertise and problem-solving skills to manage the estimation and projects effectively. Here are the key responsibilities and tasks typically associated with this role:

Key Responsibilities:

1. Power Estimation – Creating the Power models for various IPs after understanding their usecase properly. The models should be smart enough to track the silicon-proven power across various system and functional configurations
2. Power Estimation – Creating a Power model for entering all the aspects of power at SoC level, this is to be created in a bottoms-up manner to include power of logic, memories and all the various AMS and other IPs.
3. Power Optimization – Create methodologies with Frontend and Backend teams to estimate power and enable methodologies to analyse and optimize power at SoC level.
4. Power Optimization – Creating a Power Budget for each SoC, each block inside the SoC and ensuring the target is met. In order to achieve this ensure various tool based power optimization features are enabled and executed at every stage of the SoC design. 
5. Coordinate with other departments, such as Analog IP Teams, Functional Integration teams and the Digital verification teams to ensure cohesive project execution.
6. Tools to be used – 
   • MS_Excel based custom tool for SoC Power rollup to be created in-house
   • Joules/PowerArtist/Spyglass for FE Power
   • Innovus/Voltus/PTPX for BE Power
   • ZeBu for Emulation based power 

Please note that the above key areas of responsibilities are not exhaustive. Management reserves the right to assign additional responsibilities as deemed necessary to meet the evolving needs of the company.

Qualifications – 

B.Tech/Mtech or equivalent courses and Industry experience with below requirements– 

1. 3-10 years of experience as SoC power engineer with experience in Power rollup, power estimation, analysis and optimization 
2. Good understanding of basics of power, factors that impact dynamic power, factors that impact leakage power, power optimization techniques for digital circuits as well as analog circuits
3. Hands-on experience in running various tools like Spyglass, Joules, PowerArtist, Innovus, Voltus, PrimePower and ZeBu etc
4. Good to have an experience in analyzing functional and test use cases and creating the activity factors for power signoff.

Good to have experience on post-silicon analysis, debug and signoff of power in various functional and test scenarios