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EIS Engineer Role OverviewWe’re looking for a skilled EIS Engineer with a strong background in Medical Device Regulations and Control Systems Design &amp; Development (CSI). This is an exciting opportunity to work on end-to-end product development and ensure compliance with international standards. Key Responsibilities<ul><li>Lead and contribute to control system design and development for medical devices.</li><li>Ensure compliance with regulatory standards like FDA, ISO 13485, IEC 62304, etc.</li><li>Collaborate with cross-functional teams (hardware, software, QA, RA).</li><li>Prepare and maintain technical documentation for audits and approvals.</li><li>Support risk management, verification &amp; validation, and system integration.</li></ul> Requirements<ul><li>6–8 years of experience in EIS, medical device development, or control systems engineering.</li><li>Strong understanding of control systems (CSI) methodologies and tools (e.g., MATLAB/Simulink, LabVIEW, PLCs).</li><li>In-depth knowledge of medical device regulations and standards.</li><li>Excellent analytical, documentation, and communication skills.</li><li>BE/BTech or higher in Electronics, Instrumentation, Biomedical, or related fields.</li></ul> Share your updated resume now.

Teamware Solutions

Technical Operations Associate

LDD Developer We're hiring below position: Position: LDD DeveloperExperience: 6+ yearsLocation: Bangalore If you're interested, please share your profile.

Capgemini

Developer

WLAN Test Engineer Experience: 4+ YearsThis job might be for you if<ul><li>You enjoy solving problems. You love taking on difficult challenges and finding creative solutions.</li><li>You don’t know the answer but will dig until you find it.</li><li>You communicate clearly. You write well.</li><li>You are motivated and driven. You volunteer for new challenges without waiting to be asked. You will take ownership of the time you spend with us and make a difference.</li><li>You can impress our customers with your enthusiasm to solve their issues (and solve them!)</li></ul> Job OverviewAs a WLAN Test Engineer, your primary responsibility is to assess the functionality and performance of wireless networks/Devices. This includes conducting various tests to verify the network's speed, coverage, security, and overall reliability. You'll collaborate with Developers and quality assurance teams to identify and resolve any issues that may arise during testing. Additionally, you may be involved in designing test plans, executing test cases, analysing test results. Job Description<ul><li>Develop and execute test plans and test cases to assess WLAN performance, reliability, and security.</li><li>Conduct manual and automated tests to validate network configurations, protocols, and features.</li><li>Perform regression testing to ensure that new changes or updates do not adversely affect network functionality.</li><li>Identify, isolate, and document defects or issues found during testing, and work closely with development teams to resolve them.</li><li>Collaborate with cross-functional teams to understand product requirements and provide input on design and implementation considerations.</li><li>Utilize testing tools and equipment to simulate real-world network scenarios and assess performance under different conditions.</li><li>Analyze test results and provide detailed reports to stakeholders, including recommendations for network optimization and improvement.</li><li>Stay updated on industry trends, best practices, and emerging technologies related to WLAN</li><li>testing and network management.</li></ul> Qualifications<ul><li>Bachelor’s degree in Computer Science, Information Technology, Electrical Engineering, or a related field.</li><li>Proven experience in WLAN testing, network testing, or a similar role.</li><li>Proficiency in network protocols such as TCP/IP, UDP, DHCP, DNS, and HTTP.</li><li>Strong understanding of wireless networking technologies, including Wi-Fi standards (802.11a/b/g/n/ac/ax), RF fundamentals, and WLAN security protocols (WPA, WPA2, WPA3).</li><li>Familiarity with network testing tools and equipment such as traffic generators, protocol analyzers, spectrum analyzers, and wireless sniffers.</li><li>Experience with Android tools and devices is preferred.</li><li>Excellent analytical and problem-solving skills, with the ability to troubleshoot complex network issues.</li><li>Effective communication skills, with the ability to collaborate with cross-functional teams and communicate technical concepts to non-technical stakeholders.</li><li>Detail-oriented approach with a commitment to producing high-quality work and delivering accurate test results.</li></ul>

Eximietas Design

Associate Network Engineer

Design Verification Engineer This job might be for you if<ul><li>You enjoy solving problems. You love taking on difficult challenges and finding creative solutions.</li><li>You don’t know the answer but will dig until you find it.</li><li>You communicate clearly. You write well.</li><li>You are motivated and driven. You volunteer for new challenges without waiting to be asked. You will take ownership of the time you spend with us and make a difference.</li><li>You can impress our customers with your enthusiasm to solve their issues (and solve them!)</li></ul> Job OverviewWe are seeking an experienced and highly skilled Senior SOC Design Verification Engineer with a minimum of 5 years of hands-on experience in SOC Design Verification. As a key member of our team, you will play a pivotal role in ensuring the robustness and correctness of our cutting-edge System on Chip designs. Job Description<ul><li>Lead and manage SOC Design Verification efforts for complex projects, ensuring the successful execution of verification plans.</li><li>Develop and implement comprehensive verification strategies, test plans, and test benches for high-speed SOCs, including low-speed peripherals like I2C/I3C, SPI, UART, GPIO, QSPI, and high-speed protocols like PCIe, Ethernet, CXL, MIPI, DDR and HBM</li><li>Conduct Gate-level simulations, and power-aware verification using Xprop and UPF.</li><li>Collaborate closely with cross-functional teams, architects, designers, and pre/post-silicon verification teams.</li><li>Analyze and implement System Verilog assertions and coverage (code, toggle, functional).</li><li>Provide mentorship and technical guidance to junior verification engineers.</li><li>Manage and lead a dynamic team of verification engineers, fostering a collaborative and innovative work environment.</li><li>Ensure verification signoff criteria are met and documentation is comprehensive.</li><li>Demonstrate dedication, hard work, and commitment to achieving project goals and deadlines.</li><li>Adhere to quality standards, implement good test practices, and contribute to the continuous improvement of verification methodologies.</li><li>Experience with verification tools from Synopsys and Cadence, including VCS and Xsim. Integration of third-party VIPs (Verification IP) from Synopsys and Cadence.</li></ul> Qualifications<ul><li>Bachelor’s degree in computer science, Electrical/Electronics Engineering, or related field. OR</li><li>Master’s degree in computer science, Electrical/Electronics Engineering, or related field. OR</li><li>PhD in Computer Science, Electrical/Electronics Engineering, or related field.</li><li>5+ years of hands-on experience in SOC Design Verification.</li><li>Expertise in UVM (Universal Verification Methodology) and System Verilog.</li><li>Prior experience working on IP level and SOC level verification projects.</li><li>Proficient in verification tools such as VCS, Xsim, waveform analyzers, and third-party VIP integration (e.g., Synopsys VIPs and Cadence VIPs).</li><li>Hands-on experience with UFS (Universal Flash Storage), Ethernet, PCIe, CXL, MIPI protocols.</li><li>Solid understanding of low-speed peripherals (I2C/I3C, SPI, UART, GPIO, QSPI) and high-speed protocols.</li><li>Experience in DDR, HBM, Gate-level simulations, and power-aware verification using Xprop and UPF.</li><li>Proficiency in scripting languages such as shell, Makefile, and Perl.</li><li>Strong understanding of processor-based SOC verification, including native, Verilog, System Verilog, and UVM mixed environment.</li><li>C-System Verilog handshake and writing C test cases for bootup verification. Excellent problem-solving, analytical, and debugging skills.</li></ul>

Assistant Design Engineer

Senior Analog Layout Engineer Experience - 4-6 years Please share your CV at <a rel=\"noopener noreferrer\" href=\"mailto:prasad.adakambarribabu@moschip.com\" target=\"_blank\">prasad.adakambarribabu@moschip.com</a>

MosChip Technology Ltd

Electronic Engineer

LDD Architect We're hiring below position: Job Role: LDD ArchitectExperience: 8Location: Bangalore If you're interested, please share your profile.

Senior Architect

Sr SoC Verification Engineer<h4>
 
 General Information
 </h4>






 Job Title
 

 Sr SoC Verification Engineer
 



 Job ID
 

 12633
 



 Country
 

 India
 



 City
 

 Bengaluru
 



 Date Posted
 

 26-Aug-2025
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 SOC Engineering
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are:You are a passionate and experienced verification engineer eager to make a difference at the forefront of technology. With a strong foundation in electronics and a deep understanding of System-on-Chip (SoC) verification, you thrive in collaborative environments where complex problem solving and innovation are key. You have hands-on expertise in advanced verification methodologies--particularly UVM, SystemVerilog, and C/C++--and you're familiar with industry-standard protocols such as AXI-AMBA, USB, PCIe, and MIPI. Your analytical skills are matched by your ability to mentor and lead, supporting younger engineers while driving project success. You recognize the value of diversity and inclusion and bring an open-minded, adaptable approach to your work. Whether working independently or as part of a multidisciplinary team, you are proactive in learning new tools and methodologies, and you consistently deliver high-quality results. Your communication skills help you collaborate effectively with architects, designers, and verification teams, and your experience with ARM-based technologies gives you a unique edge. You are motivated by the opportunity to solve challenging customer problems and help shape the future of high-performance computing, automotive, aerospace, and defense solutions. What You'll Be Doing:  * Designing and developing comprehensive verification test plans and infrastructure based on design specifications and customer requirements. * Implementing and analyzing SystemVerilog assertions and coverage metrics (code, toggle, functional) to ensure design correctness. * Leading verification activities, mentoring junior engineers, and assisting in debugging complex issues. * Collaborating closely with architects, designers, and pre &amp; post silicon verification teams to achieve project goals. * Adhering to rigorous quality standards and best practices in test and verification processes. * Rapidly ramping up on new verification tools and methodologies using Synopsys products to enable customer success. * Developing innovative, independent solutions to technical challenges with minimal guidance. * Consistently setting and achieving task-level goals and project milestones. * Working with Synopsys teams, including Business Unit Application Engineers and Sales, to broaden and deploy tool and IP solutions. The Impact You Will Have:  * Ensuring the delivery of robust, high-quality SoC solutions for leading-edge customers in diverse industries. * Accelerating the verification process, reducing time-to-market for innovative chip designs. * Enhancing customer satisfaction by solving complex design and verification challenges. * Driving the adoption of Synopsys EDA tools and IP, strengthening the company's market leadership. * Enabling the successful launch of products in high-performance computing, automotive, aerospace, and defense sectors. * Mentoring and developing junior team members, fostering a culture of excellence and continuous learning. * Contributing to the evolution of verification methodologies and best practices. What You'll Need:  * B.E/B.Tech/M.E/M.Tech in Electronics with 4-8 years of experience in the verification domain. * Proven experience in IP or SoC level verification, including processor-based SoC environments (native, Verilog, SystemVerilog, UVM mixed). * Hands-on expertise with verification tools such as VCS, waveform analyzers, and third-party VIP integration (e.g., Synopsys VIPs). * Strong proficiency in UVM, SystemVerilog, and C/C++ for verification. * Familiarity with AXI-AMBA protocol variants, scripting languages (shell, Makefile, Perl), and ASIC design concepts and flow. * Experience with ARM core verification, USB, PCIe, MIPI protocols, and ARM-based technologies (Coresight Debug, Processor architecture) is highly desirable. * Excellent problem-solving, analytical, and debugging skills. * Effective communication skills for teamwork and customer engagement. Who You Are:  * Collaborative team player who thrives in a diverse, inclusive environment. * Proactive learner, always eager to master new tools and methodologies. * Detail-oriented with a strong commitment to quality and excellence. * Natural mentor and leader, able to support and guide junior engineers. * Resourceful thinker with a passion for solving complex technical challenges. * Clear communicator, able to convey technical concepts to various audiences. The Team You'll Be A Part Of:  You'll join the System Solutions Group (SSG), a dynamic team delivering expertise in tool, methodology, architecture, design creation, verification, and physical implementation. SSG partners with startups, industry leaders, commercial companies, and government agencies to tackle the most challenging SoC projects--from sub-blocks to full turnkey solutions. Our team is passionate about enabling customers in high-performance computing, automotive, aerospace, and defense to achieve their goals with innovative, reliable solutions. Rewards and Benefits:  We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.<h4>Experience Level</h4>Senior Level

Synopsys India Pvt Ltd

Embedded Systems Engineer

RTL Design and Signoff, Principal Engineer<h4>
 
 General Information
 </h4>






 Job Title
 

 RTL Design and Signoff, Principal Engineer
 



 Job ID
 

 12630
 



 Country
 

 India
 



 City
 

 Noida
 



 Date Posted
 

 26-Aug-2025
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 SOC Engineering
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

<h4 id="isPasted">We Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.<h4> </h4><h4>You Are:</h4>You are a seasoned engineering professional with a passion for tackling complex SoC challenges. With 12+ years' experience, you thrive in dynamic environments and excel at leading multidisciplinary teams through the intricacies of RTL design and signoff. You possess deep expertise in RTL methodologies, static verification, and timing analysis, and you’re driven to deliver robust, high-quality solutions that enable customer success. Your collaborative spirit, strategic mindset, and attention to detail allow you to translate customer requirements into innovative design flows. You stay ahead of technological trends, continuously learning new tools and techniques, and you’re eager to mentor others in best practices for design and verification. You value diversity and inclusion, recognizing that varied perspectives fuel innovation. Your communication skills empower you to bridge gaps across teams, stakeholders, and customers, ensuring alignment and clarity. You take pride in your ability to solve technical problems efficiently, make informed decisions under pressure, and deliver results that exceed expectations. Above all, you are motivated by the opportunity to shape the future of smart technologies and contribute to projects that impact industries worldwide.<h4> </h4><h4>What You’ll Be Doing:</h4><ul><li>Partnering with Synopsys customers to define RTL signoff and design scopes, ensuring alignment with project objectives.</li><li>Analyzing design complexity and requirements to propose optimal resource allocation for successful project delivery.</li><li>Leading engineering teams in executing pre-silicon static verification activities on IPs and subsystems.</li><li>Developing and refining timing constraints for synthesis and timing, based on design architecture and requirements.</li><li>Collaborating with peers to enhance methodologies, driving improvements in execution efficiency and project quality.</li><li>Adopting and mastering new RTL design and static verification tools/methodologies using Synopsys products for customer enablement.</li><li>Working cross-functionally with Business Unit Application Engineers and Sales to broaden and deploy tool and IP solutions.</li><li>Establishing robust flows and methodologies to enable rapid setup for RTL quality checks, synthesis, and formality.</li><li>Training team members on advanced design concepts and root-cause analysis to foster continuous learning and growth.</li></ul><h4> </h4><h4>The Impact You Will Have:</h4><ul><li>Accelerating customer success by delivering reliable RTL design and signoff solutions for challenging SoC projects.</li><li>Enabling startups, commercial enterprises, and government agencies to achieve first-time-right silicon implementations.</li><li>Driving adoption of innovative Synopsys technologies and methodologies across diverse customer segments.</li><li>Enhancing team capabilities through mentorship and knowledge sharing, fostering a culture of technical excellence.</li><li>Improving project delivery timelines and quality by optimizing verification flows and resource utilization.</li><li>Contributing to the evolution of industry-leading chip design practices and standards.</li><li>Strengthening Synopsys’ reputation as a trusted partner for cutting-edge semiconductor solutions.</li></ul><h4> </h4><h4>What You’ll Need:</h4><ul><li>B.E/B. Tech/M.E/M. Tech in electronics or a related field.</li><li>Minimum of 12+ years’ experience in RTL design and verification, with a proven track record of technical leadership.</li><li>Expertise in LINT, CDC, RDC checks, and static verification methodologies.</li><li>Strong background in setting up flows and deploying RTL signoff tools for rapid project initiation.</li><li>Advanced skills in debugging, diagnosing violations, and resolving complex design issues.</li><li>Proficiency in developing and validating timing constraints; experience with preliminary synthesis and area estimation.</li><li>Demonstrated ability to lead teams through the RTL signoff process for complex SoC/IP/subsystems.</li><li>Experience with project planning and activity management in RTL signoff and design.</li><li>Solid understanding of ASIC design concepts, flows, and stakeholder requirements.</li><li>Excellent verbal and written communication skills to facilitate collaboration and customer engagement.</li></ul><h4> </h4><h4>Who You Are:</h4><ul><li>Analytical and detail-oriented, with a proactive approach to problem solving.</li><li>Collaborative leader and mentor, able to inspire and guide teams to success.</li><li>Adaptable and resilient, thriving in fast-paced, evolving environments.</li><li>Innovative thinker, constantly seeking opportunities for process improvement and technological advancement.</li><li>Effective communicator, capable of translating complex concepts for diverse audiences.</li><li>Committed to fostering an inclusive, respectful, and supportive workplace culture.</li></ul><h4> </h4><h4>The Team You’ll Be A Part Of:</h4>You’ll join the System Solutions Group (SSG), a global team of experts dedicated to delivering architecture, design, verification, and implementation solutions for the world’s most challenging SoC projects. SSG partners closely with customers ranging from startups to industry leaders, leveraging Synopsys’ advanced technologies to enable successful chip development from sub-blocks to full turnkey solutions. Collaboration, innovation, and technical excellence define our team culture.<h4> </h4><h4>Rewards and Benefits:</h4>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</h4>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.<h4>Experience Level</h4>Senior Level

Test Engineer, Embedded Systems, Silicon<h4>Minimum qualifications:</h4><ul><li>Bachelor's degree in Electronics, Computer Science, a related field, or equivalent practical experience.</li><li>2 years of experience in a hardware or embedded testing/automation role.</li><li>Experience testing embedded software on SoC on Linux, Android or Real-Time Operating System.</li></ul> <h4>Preferred qualifications:</h4><ul><li>5 years of experience in a hardware or embedded testing/automation role.</li><li>Experience in Linux kernel driver test automation and framework development.</li><li>Experience in Android application development.</li><li>Excellent programming skills in modern Python.</li><li>Excellent programming skills in Java, C/C++, JNI.</li></ul><h4>About the job</h4>Google's custom-designed machines make up one of the largest and most powerful computing infrastructures in the world. The Hardware Testing Engineering team ensures that this cutting-edge equipment is reliable. In the R&amp;D lab, you design test equipment for prototypes of our machinery and develop the protocols used to scale these tests for the entire global team. Working closely with design engineers, you give input on designs to improve our hardware until you're sure it meets Google's standards of quality and reliability.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.<h4>Responsibilities</h4><ul><li>Take ownership of delivering exceptional software quality for one or more Intellectual Property (IP) within silicon software.</li><li>Create and implement test strategies by working with development teams to identify risk areas and fill the testing gaps.</li><li>Drive test automation using existing test frameworks and work with the Engineering Productivity team to enhance and develop new test frameworks based on test requirements.</li><li>Cultivate Product and Engineering Excellence as a core value in test engineering and our associated development partners.</li><li>Triage and analyze test results and incoming feedback to identify areas for improvement. Guide, mentor, and coach other team members with regards to process technology.</li></ul><h4>Experience Level</h4>Mid Level

Google India Pvt Ltd

Test Engineer

ASIC Engineer, IP Design, Silicon<h4>Minimum qualifications:</h4><ul><li>Bachelor’s degree in Electrical/Computer Engineering or equivalent practical experience.</li><li>3 years of experience with Register-Transfer Level (RTL) design and integration using Verilog/System Verilog, microarchitecture and automation.</li><li>Experience with RTL design using Verilog/System Verilog and microarchitecture.</li><li>Experience with a scripting language like Python or Perl.</li></ul> <h4>Preferred qualifications:</h4><ul><li>Master's degree in Computer Science or Electrical Engineering.</li><li>6 years of industry experience with IP design.</li><li>Experience with methodologies for low power estimation, timing closure, and synthesis.</li><li>Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC).</li></ul><h4>About the job</h4>Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.<h4>Responsibilities</h4><ul><li>Define microarchitecture details, block diagram, data flow, pipelines, etc.</li><li>Perform RTL development (SystemVerilog), debug functional/performance simulations.</li><li>Perform RTL quality checks including Lint, CDC, Synthesis, UPF checks.</li><li>Participate in synthesis, timing/power estimation and FPGA/silicon bring-up.</li><li>Communicate and work with multi-disciplined and multi-site teams.</li></ul><h4>Experience Level</h4>Mid Level

Silicon Design Verification Manager II, Camera ISP<h4>Minimum qualifications:</h4><ul><li>Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. </li><li>10 years of experience with Camera ISP image processing or other multimedia IPs such as Display or Video Codec.</li><li>10 years of experience with System Verilog Assertions (SVA), assertion-based verification, and formal verification.</li><li>4 years of experience in people management, developing employees. </li></ul> <h4>Preferred qualifications:</h4><ul><li>Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. </li><li>Experience in low-power design verification. </li><li>Experience working with RTL design and integration teams on methodologies that improve team productivity and velocity.</li><li>Experience working with software teams to define hardware/software interfacing including control/status registers, security, and error handling.</li></ul><h4>About the job</h4>Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.<h4>Responsibilities</h4><ul><li>Lead a team of individuals; set and communicate individual and team priorities that support organizational goals. Meet regularly with individuals to discuss performance and development, and provide feedback and coaching. </li><li>Work cross-functionally to debug failures and verify the functional correctness of the design. </li><li>Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use. </li><li>Plan the verification of complex Camera ISP hardware IPs at subsystem and full chip level by fully understanding the design specification and interacting with architecture and design engineers to identify important verification scenarios.</li><li>Create and enhance constrained-random verification environments using System Verilog and UVM.</li></ul><h4>Experience Level</h4>Senior Level

QA Test Engineer

Member Of Technical Staff, DFM Firmware EngineerWe’re in an unbelievably exciting area of tech and are fundamentally reshaping the data storage industry. Here, you lead with innovative thinking, grow along with us, and join the smartest team in the industry.This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us.SHOULD YOU ACCEPT THIS CHALLENGE...The DFM Firmware Team plays a crucial role in designing and developing the Direct Flash Module (DFM) – a key module of Pure's Flasharray and Flashblade enterprise storage solutions. The DFM is an internally designed enterprise storage device using the NAND flash technology. Compared with the off-the-shelf SSD, the DFM has the competitive advantage of  simplicity, high performance, low cost and scalability.As a member of the DFM firmware team, you'll have rare opportunities to work across various domains, including the entire data path, NAND media management, and low-level hardware interfaces. Our firmware design enables us to quickly integrate the latest NAND technologies from various vendors. We were pioneers in adopting QLC for enterprise storage solutions, releasing the first QLC DFM in 2019. Our proprietary media management policies and algorithms position Pure as a leader in enabling QLC NAND in the enterprise storage industry.You'll work closely with the Purity software, hardware, NAND, and drive qualification teams. This offers a unique opportunity to learn the latest technologies, including the newest generations of NAND, NVMe/PCIe, as well as SSD controllers. Firmware development opens doors to experiences in embedded software design, hardware and system integration. You'll develop a comprehensive understanding and gain insights into the entire product development and release process.What You Will Be DoingPure Storage is seeking a full-time Firmware Engineer to join our device firmware team. You will be working as part of a small, but fast growing, dynamic team and will be responsible for:<ul><li>Designing firmware simulation environment, investigating and debugging issues, and developing failure analysis tools and process</li><li>Designing, implementing, and testing firmware of Pure Storage’s DirectFlash™ SSD Modules</li><li>Coding and testing in C/C++ and Python</li><li>Bringing up and enabling new hardware components including latest NAND and developing low level firmware features</li><li>Internal development automation including continuous integration, automated unit and regression testing, etc</li><li>Working closely with hardware, system software and manufacturing teams</li></ul>What You Bring to the Team<ul><li>BS in Computer Science or equivalent</li><li>Strong experience with NAND, Flash, and/or SSD Device Firmware Development</li><li>Strong understanding of software/firmware test and release processes</li><li>Experience using Python, C/C++  or related programming languages, hands on experience in developing the SI</li><li>Familiar with embedded software or firmware development</li><li>Experience with Micro-controllers, SoC, or hardware bring-up</li><li>Good verbal communication &amp; collaboration skill.</li><li>Must be willing and able to work in an open office, team environment.</li><li>We are primarily an in-office environment and therefore, you will be expected to work from the Banglaore office in compliance with Pure’s policies, unless you are on PTO, or work travel, or other approved leave.</li></ul>WHAT YOU CAN EXPECT FROM US:<ul><li>Pure Innovation: We celebrate those who think critically, like a challenge and aspire to be trailblazers.</li><li>Pure Growth: We give you the space and support to grow along with us and to contribute to something meaningful. We have been Named Fortune's Best Large Workplaces in the Bay Area™, Fortune's Best Workplaces for Millennials™ and certified as a Great Place to Work®!</li><li>Pure Team: We build each other up and set aside ego for the greater good.</li></ul>And because we understand the value of bringing your full and best self to work, we offer a variety of perks to manage a healthy balance, including flexible time off, wellness resources and company-sponsored team events. Check out <a href="http://purebenefits.com">purebenefits.com</a> for more information.ACCOMMODATIONS AND ACCESSIBILITY:Candidates with disabilities may request accommodations for all aspects of our hiring process. For more on this, contact us at <a href="mailto:TA-Ops@purestorage.com">TA-Ops@purestorage.com</a> if you’re invited to an interview.OUR COMMITMENT TO A STRONG AND INCLUSIVE TEAM:We’re forging a future where everyone finds their rightful place and where every voice matters. Where uniqueness isn’t just accepted but embraced. That’s why we are committed to fostering the growth and development of every person, cultivating a sense of community through our Employee Resource Groups and advocating for inclusive leadership. Pure is proud to be an equal opportunity and affirmative action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or any other characteristic legally protected by the laws of the jurisdiction in which you are being considered for hire.<h4>Experience Level</h4>Senior Level

Pure Storage India Pvt Ltd

Storage Firmware Developer Key Responsibilities<ul><li>Develop and maintain firmware for storage devices.</li><li>Implement new features and optimize existing functionalities.</li><li>Perform debugging and troubleshooting of firmware issues.</li><li>Collaborate with cross-functional teams to ensure seamless integration of firmware with hardware.</li><li>Create and maintain documentation for firmware development processes.</li></ul> Requirements<ul><li>Bachelor’s or master’s degree in computer science, Electrical Engineering, or a related field.</li><li>2 to 10+ years of experience in firmware development for storage or embedded systems.</li><li>Strong firmware design and debug experience using assembly and C programming.</li><li>Deliver on cutting-edge storage products with interfaces like SAS, SATA, NVMe, PCIe.</li><li>Work with cross functional teams to develop HDD/SSD/NAND products would be a strong plus.</li><li>Strong problem-solving and analytical skills.</li></ul>

Embedded Software Developer

Memory Layout Engineer 7Rays Semiconductors India Private Limited is seeking experienced Memory Layout Engineer with over 5 years of experience.&nbsp;The job opportunity is based in Bangalore with a 30-day notice period. If you are interested in this role, please share your resume or references with deepti.negi@7rayssemi.com.

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