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Associate Architect Responsibilities: <ul><li>Hosting infrastructure and setting up the core platform form the&nbsp;backbone of any system.</li><li>As part of this team, you will be responsible for&nbsp;Architect and implement a scalable monitoring and logging platform stack to&nbsp;enhance observability across microservices.&nbsp;</li><li>Design, develop, and maintain automation scripts and tools using Python or&nbsp;Golang to streamline infrastructure operations.&nbsp;</li><li>Optimize cloud infrastructure (AWS, GCP, or Azure) and Kubernetes-based&nbsp;deployments for high availability and resilience.&nbsp;</li><li>Collaborate with development and operations teams to define best practices for&nbsp;reliability, scalability, and incident management.&nbsp;</li><li>Enhance security, compliance, and fault tolerance in the cloud and Kubernetes&nbsp;ecosystem.&nbsp;</li><li>Analyze system metrics and logs to proactively identify performance bottlenecks&nbsp;and prevent failures.&nbsp;</li><li>Lead post-mortem analysis and drive root cause identification for production&nbsp;incidents.&nbsp;</li><li>Capacity planning and workload optimization, cost monitoring by adopting best&nbsp;practices.&nbsp;</li><li>Good understanding of protocols like gRPC, layer 7 security etc.&nbsp;</li></ul> Requirements:<ul><li>Strong experience in designing and implementing monitoring/logging platforms&nbsp;(e.g., Prometheus, Grafana, ELK, Loki, OpenTelemetry, Datadog, NewRelic etc.).&nbsp;</li><li>Hands-on experience in automation and scripting using Python or Golang.&nbsp;</li><li>Proficiency in managing and scaling Kubernetes (K8s) clusters in production.&nbsp;</li><li>Experience with cloud platforms such as AWS, GCP, or Azure, and understanding&nbsp;of their networking, security, and scalability aspects.&nbsp;</li><li>Knowledge of Infrastructure as Code (IaC) tools like Terraform, Helm, or Ansible.&nbsp;</li><li>Experience in CI/CD tooling (Jenkins, GitHub Actions, ArgoCD, etc.).&nbsp;</li><li>Experience with service mesh technologies like Istio or Linkerd.&nbsp;</li><li>Understanding of SRE principles such as SLIs, SLOs, and error budgets.&nbsp;</li><li>Familiarity with incident response and post-mortem best practices.&nbsp;</li><li>Strong problem-solving skills</li></ul> Experience :<ul><li>8Y - 14Y</li></ul>

Myntra

Junior Architect

AI Engineer (Automotive)•	5+ years of working experience of in-vehicle software development in Automotive OEMs or Tier 1 Suppliers 
•	Should have thorough knowledge of Automotive software development and validation
•	Experience in leveraging AI (including a Programming language like Python or Scala, working with ML models and AI services on the cloud like AWS AI services)
•	Knowledge of DevOps tools and processes A day in the life of an Infoscion
•	As part of the Infosys consulting team, your primary role would be to get to the heart of customer issues, diagnose problem areas, design innovative solutions and facilitate deployment resulting in client delight.
•	You will develop a proposal by owning parts of the proposal document and by giving inputs in solution design based on areas of expertise. 
•	You will plan the activities of configuration, configure the product as per the design, conduct conference room pilots and will assist in resolving any queries related to requirements and solution design
•	You will conduct solution/product demonstrations, POC/Proof of Technology workshops and prepare effort estimates which suit the customer budgetary requirements and are in line with organization’s financial guidelines 
•	Actively lead small projects and contribute to unit-level and organizational initiatives with an objective of providing high quality value adding solutions to customers. 

If you think you fit right in to help our clients navigate their next in their digital transformation journey, this is the place for you!

Infosys

Automation Process Engineer

Automotive Engineer•	5+ years of Experience in Automotive OEMs or Tier 1 Suppliers
•	Responsible for developing and maintaining software for automotive systems (ECUs), working closely with hardware engineers to integrate and validate software and hardware systems, ensuring the functionality and performance of automotive applications (IVI, Navigation, ADAS etc.)
•	Develop and implement software solutions for automotive systems like infotainment, power train, Body electronics etc. 
•	Should be familiar with Automotive development phases (V Model) from requirements engineering to implementation
•	Testing and Debugging: Design and execute software tests to identify and fix bugs, ensuring the reliability and safety of automotive software
•	Work with hardware engineers to integrate and validate software and hardware systems (possibly with Suppliers across the globe)
•	Proficiency in programming languages such as C++, Python, Java, and embedded systems A day in the life of an Infoscion
•	As part of the Infosys consulting team, your primary role would be to get to the heart of customer issues, diagnose problem areas, design innovative solutions and facilitate deployment resulting in client delight.
•	You will develop a proposal by owning parts of the proposal document and by giving inputs in solution design based on areas of expertise. 
•	You will plan the activities of configuration, configure the product as per the design, conduct conference room pilots and will assist in resolving any queries related to requirements and solution design
•	You will conduct solution/product demonstrations, POC/Proof of Technology workshops and prepare effort estimates which suit the customer budgetary requirements and are in line with organization’s financial guidelines 
•	Actively lead small projects and contribute to unit-level and organizational initiatives with an objective of providing high quality value adding solutions to customers. 

If you think you fit right in to help our clients navigate their next in their digital transformation journey, this is the place for you!

Automotive Service Engineer

SDV Architect•	15+ years of experience in the Automotive industry with at least 10 years as an Architect designing Automotive components and systems.
•	Should have deep experience in designing and building ECUs
•	Deep experience in at least few of the Automotive subsystems- Infotainment, Power Electronics, Body &amp; Chassis, ADAS etc.
•	Should have good working knowledge of SDV compulsory
•	Strong communication skills and broad knowledge of standards, patterns, processes in the Automotive industry
•	Experience of Automotive standards and processes like AUTOSAR, ASPICE, FuSA, SOTIF, COVESA and SOAFEE
•	Thorough knowledge of Automotive SDLC and V-Model; should have working experience anchoring a few large programs •	Knowledge of architectural design patterns, performance tuning, database and functional designs
•	Hands-on experience in Service Oriented Architecture
•	Ability to lead solution development and delivery for the design solutions
•	Experience in designing high level and low level documents is a plus
•	Good understanding of SDLC is a pre-requisite
•	Awareness of latest technologies and trends
•	Logical thinking and problem solving skills along with an ability to collaborate •	Define end to end Architecture strategy and blueprint for vehicle software platforms
•	Guide the development and validation teams in development, debugging, diagnostics and validation of the different subsystems
•	Evaluate tool chains and recommend the optimal combination of tools for our customers
•	Anchor building new capabilities in in-vehicle software development and V&amp;V
•	Participate in RFPs to design and propose SDV solutions
•	Collaborate with multi-discplinary teams like DevOps, E/E, Telematics, Cloud Engg, Security, Hardware, Suppliers etc.

Senior Architect

RDKV, STB ArchitectSTB Architecture, RDKV, NodeJS, Javascript, C/C++, OOP &amp; Design Experience in embedded systems, multimedia and Digital TV, C/C++, JS,  understanding of RDK ecosystem principles, designs, functional components, knowledge of Linux OS internals,  Good understanding of video encoding, streaming and various media delivery, Very good understanding in CA &amp; DRM systems, Understanding of E2E video management technologies, Experience in broadcast TV, IPTV and OTT solutions, Experience in Nagra CA (security design, SoC capabilities, certification process) and other CA and DRM certifications, Experience in Software development tools, Capability to translate business requirements into architectural framework and design, Very good knowledge/expertise in Smart RCU integration (BLE), Platform Abstraction Layer to onboard new platforms, Yocto, Boot loaders. Experience in embedded systems, multimedia and Digital TV, C/C++, JS,  understanding of RDK ecosystem principles, designs, functional components, knowledge of Linux OS internals,  Good understanding of video encoding, streaming and various media delivery, Very good understanding in CA &amp; DRM systems, Understanding of E2E video management technologies, Experience in broadcast TV, IPTV and OTT solutions, Experience in Nagra CA (security design, SoC capabilities, certification process) and other CA and DRM certifications, Experience in Software development tools, Capability to translate business requirements into architectural framework and design, Very good knowledge/expertise in 3rd party OTT apps native integration (Netflix, Prime, Disney+ and YT), RDK Thunder architecture, RDK Firebolt SDK integration.

Software Development LeadProject Role : Software Development Lead Project Role Description : Develop and configure software systems either end-to-end or for a specific stage of product lifecycle. Apply knowledge of technologies, applications, methodologies, processes and tools to support a client, project or entity. Must have skills : Dassault Systemes 3DEXPERIENCE ENOVIA Customization Good to have skills : NA Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary: 
As a Software Development Lead, you will engage in the development and configuration of software systems, either managing the entire process or focusing on specific stages of the product lifecycle. Your day will involve collaborating with team members, applying your expertise in various technologies and methodologies, and ensuring that the software solutions meet client needs effectively and efficiently. You will also be responsible for troubleshooting issues and implementing improvements to enhance system performance and user experience.
 
Roles &amp; Responsibilities: 
1. Identifying the data migration impact of all proposed changes
2. Reviewing gaps and proposing a solution for data migration during the solution design phase
3. Devise and get approval for the data migration strategy for the implementation
4. Oversee and ensure the Data mapping and Tool mapping and Data tool/framework Gap analysis
5. Reviewing as is data quality and putting in place plans to address any required data quality improvements
6. Ensure the accurate filling of intermediate data tables d2. Working closely with 
7. working closely with Business Analysts and other stakeholders to produce accurate estimates and manage the transition from analysis through to 3DEXPERIENCE/TeamCentre/CATIAV5/Enovia/SAP/ 3D models and product data using data load to 3Dx SAAS Platform.
 
Professional &amp; Technical Skills: 
- Must Have Skills: Proficiency in Dassault Systemes 3DEXPERIENCE ENOVIA Customization.
 
-Experience on 3DEXPERIENCE 2022x or above migration and configuration
-Work experience in end-to-end handling ETL tool (preferably 3dx migration factory tools set)
-Should have work experience in using XPDM, TCXML, 3DXml, Enovia xPDM integration process and ----Manage monitoring integration setup xPDM Gateway 
-Exposure to 3DEXPERIENCE webservices.
-Exposure to TSystems Extraction and Transformation to 3DX
-Exposure to BOM restructuring, variant configuration using XPDMXML or EKL , postprocessing
-Experience in ETL processing using the frameworks and tools like JAXB SSIS, Talend.
 
Additional Information: 
1. 8+ years of experience in 3DExperience Enovia Migration and Customization
2. 4+ years of experience in 3DExperience Enovia CAD and nonCAD data Migration implementation and delivery.
2. Outstanding all-round communication skills and ability to work collaboratively 
3. Good Project Management experience 
4. Good Team management skills and work closely with other peers .
- This position is based at our Chennai office.
- A 15 year full time education is required.

Accenture India Private Limited

Senior Software Developer

Memory /Custom Layout Design Professional We are hiring for \"Memory /Custom Layout Design\". Requirement<ul><li>Sound knowledge &amp; hands on experience in Finfet technology, layout design and DRC limitations.</li><li>Proficient in physical verification flow &amp; debug, like DRC, LVS, ERC, Boundary conditions.</li></ul> Location: BangaloreExperience: 3 to 9years. If interested, you can share resume.

Capgemini

Mechanical CAD Designer

Staff STPG PE Test Platform - Hardware Characterization EngineerOur vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.At Micron, we transform how the world uses information to enrich life for all.  The pace is fast, teamwork occurs on a regular basis, and innovation is encouraged.  As a test platform development Engineer within the Non-Volatile Engineering (NVEG) Product Engineer team, you will develop and qualify low-cost in-house engineering test platforms and tackle sophisticated problems.  This role requires deep understanding of test hardware and software along with NAND, UFS and PCIe protocol knowledge.  You will be responsible to enable the PE test infrastructure and test platforms to test, debug and characterizing the NAND component and System products by closely working with the multi-functional teams such as Test Engineering and System Integration, ASIC and FW teams and assist Qualification and Ramping of innovative NAND and System Micron products. Key Responsibilities:<ul><li>Design, develop, and qualify product engineering test hardware, platforms, test firmware and software for non-volatile memory product bring up and debug.</li><li>Design novel test algorithms and develop test programs for validating and characterizing NAND features, commands, timings and currents</li><li>Characterization, debug, and validation of NAND according to the data sheet specification and in customer’s designs and systems</li><li>Developing NAND validation and characterization programs and using those programs to debug advanced NAND designs and features.</li><li>Use high-speed tester hardware to perform functional and design validation of new NAND devices</li><li>Assisting NAND design bring up, validation, reticle experiments, and firmware changes.</li><li>Collaborate with multi-functional teams, including Test Engineering &amp; System Integration, ASIC, FW, Product Engineering and operations, to integrate FPGA designs with other system components.</li><li>Provide engineering test solutions (HW &amp; SW) for Product Development for NAND/System characterization and Silicon debug capabilities</li><li>Drive and support new protocol enablement (SCA- Separate Command Address, ONFI, UFS, PCIe) and capability bring up</li><li>Routinely communicate overall project status to leadership and multi-functional product team</li><li>Provide mentorship through debug and resolution of product related issues</li></ul>Qualifications:Successful candidates for this great opportunity will have:<ul><li>3-7 yrs proven experience NAND related product and/or test program, development, board-bring up, Automated Test Equipment (ATE) such as Magnum or Advantest testers.</li><li>Knowledge of storage interface such as High Speed ONFI, UFS, PCIe, etc.</li><li>Memory and Storage System behavior, architecture and design</li><li>Strong hands-on experience working with hardware bring-up and debugging and lab tools such as logic analyzers, oscilloscopes.</li><li>Familiar working on Unix/Linux terminal and scripting (Perl, Python etc.)</li><li>Solid understanding of semiconductor device physics, characterization techniques and equipment.</li><li>Ability to work independently in a very fast paced environment and adapt to change</li><li>Aim to resolve root-cause and provide corrective action for product issues</li><li>Self-motivated and hardworking in an ambitious multifaceted environment</li><li>Proven track record to partner successfully with other groups to build strong peer relationships and achieve the best outcomes for Micron</li></ul>Education:<ul><li>Position requires a minimum of a Bachelor's degree in Electrical, Electronics or Computer Engineering</li><li>Course work in VLSI, semiconductor process is desirable, but not required.</li></ul>About Micron Technology, Inc.We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact <a href="mailto:hrsupport_in@micron.com" rel="noopener noreferrer" target="_blank">hrsupport_india@micron.com</a>Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.   Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.<h4>Experience Level</h4>Senior Level

Micron Technology Operations India Llp

Associate Hardware Engineer

Memory Characterization Engineer<h4>
 
 General Information
 </h4>






 Job Title
 

 Memory Characterization Engineer
 



 Job ID
 

 12439
 



 Country
 

 India
 



 City
 

 Noida
 



 Date Posted
 

 05-Aug-2025
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 R&amp;D Engineering
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

<h4>We Are:</h4>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.<h4>You Are:</h4>You are a passionate and experienced engineer eager to make a significant impact in the world of embedded memory development and characterization. With a strong academic background in Electrical &amp; Electronics Engineering and at least 2 years of hands-on experience in VLSI design and characterization, you thrive in collaborative, innovative environments. You possess a deep understanding of SRAM and Register File architectures, and you are well-versed in the nuances of advanced custom circuit implementation and their characterization, especially at the most advanced technology nodes such as FinFET and submicron processes. Your expertise in scripting and automation, combined with a solid grasp of both digital and analog fundamentals, empowers you to tackle complex challenges and deliver high-quality, efficient solutions.You are a creative problem-solver who welcomes technical challenges and approaches them with curiosity and determination. Your communication skills, adaptability, and ability to work seamlessly across teams make you a valued collaborator. You are committed to continuous learning and excited by the prospect of working at the intersection of technology and innovation. As an advocate for best practices and a mentor to junior engineers, you foster an environment of growth and inclusion. Your commitment to excellence, quality, and customer focus ensures that you deliver solutions that exceed expectations and contribute meaningfully to Synopsys' leadership in the semiconductor industry.<h4>What You’ll Be Doing:</h4><ul><li>Conduct detailed characterization of SRAM devices, including timing, power, and reliability testing.</li><li>Develop and implement comprehensive test plans and methodologies for SRAM characterization.</li><li>Analyze characterization data to identify trends, anomalies, and areas for improvement.</li><li>Design and implement low-power, area-efficient embedded memory circuits and architectures, including SRAM and register files.</li><li>Collaborate with design engineers to refine SRAM designs based on characterization results.</li><li>Support the development of automated test setups and characterization tools to enhance efficiency.</li><li>Network with senior engineers across disciplines and locations to ensure optimal solutions and knowledge sharing.</li></ul><h4>The Impact You Will Have:</h4><ul><li>Contribute to the optimization of SRAM designs, leading to improved performance and reduced power consumption, critical for modern applications.</li><li>Enhance the efficiency of the characterization process, allowing for faster time-to-market for new products.</li><li>Influence product development decisions through data-driven insights, driving innovation and competitiveness in the market.</li><li>Foster innovation within the team, championing new ideas and approaches to complex characterization challenges.</li><li>Contribute to the development of cutting-edge embedded memory IP that powers the next generation of integrated circuits.</li><li>Uphold Synopsys' reputation for delivering high-quality, reliable, and innovative semiconductor IP to global customers.</li></ul><h4>What You’ll Need:</h4><ul><li>BE/B.Tech/ME/M.Tech/MS in Electrical &amp; Electronics Engineering from a recognized institute or university.</li><li>Minimum of 2 years of experience in SRAM design and characterization or related semiconductor roles.</li><li>Strong understanding of multiple aspects of memory characterization.</li><li>Strong understanding of CMOS fundamentals, SRAM architecture, and characterization methodologies.</li><li>Hands-on experience with characterization of FinFET and deep submicron technology nodes.</li><li>Mastery in scripting languages such as Perl and Python for automation and optimization.</li><li>Excellent problem-solving skills and attention to detail.</li><li>Strong communication and collaboration skills, with the ability to work effectively in a team environment.</li></ul><h4>Who You Are:</h4><ul><li>Analytical thinker with strong problem-solving skills and attention to detail.</li><li>Effective communicator who thrives in cross-functional, multicultural teams.</li><li>Proactive and self-driven, with a strong sense of ownership and accountability.</li><li>Flexible, adaptable, and eager to learn new technologies and methodologies.</li><li>Collaborative team player who values diversity and inclusion.</li><li>Customer-focused, with a commitment to delivering high-quality solutions on time.</li></ul><h4>The Team You’ll Be A Part Of:</h4>You will join the Embedded Memory and Logic Team in Noida, a dynamic group within the Solutions Group at Synopsys. The team is dedicated to the development of standard and custom embedded SRAMs and ROMs, providing both functional and physical memory views through cutting-edge memory compilers. With end-to-end responsibility for bit cell analysis, architecture design, characterization, and verification, the team thrives on innovation, collaboration, and technical excellence. You'll work alongside talented engineers who are passionate about advancing semiconductor technology and delivering world-class IP solutions to global customers.<h4>Rewards and Benefits:</h4>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.<h4>Experience Level</h4>Mid Level

Synopsys India Pvt Ltd

Test Engineer

Engineering Manager - Cricinfo<div>Job Summary: As an Engineering Manager, you’ll lead the engineering charter that powers the Cricinfo apps &amp; services. You’ll own the suite of web applications, mobile apps and services that power the leading cricket destination around the globe. You’ll work on systems that directly impact hundreds of millions of users. Our work also empowers the editorial teams and commentators across the digital and broadcast experiences.</div><div> </div><div>About the team: The Cricinfo &amp; Sports Experience team is redefining how fans experience sports. We blend rich stats, social features, and fandom layers to go beyond passive viewing, making JioHotstar a destination for passionate sports communities. Whether it's live match stats, fan polls, or community hubs, we are creating the next evolution of connected sports experiences.</div><h4>What will you do?</h4><li>Lead and scale the Cricinfo &amp; Sports Experiences teams, responsible for the apps that our users depend upon for the latest bytes. Handle the team responsible for crafting innovative sports experiences that keeps users engaged beyond just video</li><li>Drive technical roadmaps aligned with business stakeholders including but not limited to - Strategy, Editorial, Broadcast in combination with Engineering Led Initiatives</li><li>Partner closely with Product, UX, and Data Science teams to define and deliver a personalised experience</li><li>Design backend systems that scale to millions of users, handle 20x live event surges, and maintain sub-second API latencies.</li><li>Champion engineering excellence across observability, performance tuning, cost efficiency, and resiliency for our services</li><li>Own and improve key metrics like Web Vitals, App Performance, API Uptime and Availability</li><li>Foster a high-ownership engineering culture focused on data-driven decision making, experimentation velocity, and customer-first thinking</li><li>Build and manage a world-class engineering team responsible for developing and delivering high-quality products</li><li>Create effective mechanisms to set goals for the team, create execution plans and track progress against those. You'll collaborate with other Developers, Program Managers, and tech support teams, in an agile environment to estimate and deliver objectives set together as a team.</li><h4>Who should apply for this role?</h4><li>Expertise in any programming language (e.g. Python or Java or Golang or JavaScript)Hands-on with systems architecture and an experience with distributed systems</li><li>Experience with high scale databases - MySQL, NoSQL (Cassandra, Redis, DynamoDB)</li><li>Experience using any major cloud provider (AWS, Azure, or Google Cloud) for production applications</li><li>Experience with CI/CD processes</li><li>A strong track record of project delivery for large, cross-functional, projects and bringing in and growing engineering talent</li><li>Excellent written and verbal communication skills with the ability to present complex technical information clearly and concisely to a variety of audiences</li> <div>About Us</div><div>Perched firmly at the nucleus of spellbinding content and innovative technology, JioStar is a leading global media &amp; entertainment company that is reimagining the way audiences consume entertainment and sports. Its television network and streaming service together reach more than 750 million viewers every week, igniting the dreams and aspirations of hundreds of million people across geographies.</div><div> </div><div> JioStar is an equal opportunity employer. The company values diversity and its mission is to create a workplace where everyone can bring their authentic selves to work. The company ensures that the work environment is free from any discrimination against persons with disabilities, gender, gender identity and any other characteristics or status that is legally protected.</div>

Viacom18 Media Pvt Ltd

Engineering Manager

Director, PDS ProjectsJLL empowers you to shape a brighter way.  Our people at JLL and JLL Technologies are shaping the future of real estate for a better world by combining world class services, advisory and technology for our clients. We are committed to hiring the best, most talented people  and empowering them to  thrive, grow meaningful careers and to find a place where they belong.  Whether you’ve got deep experience in commercial real estate, skilled trades or technology, or you’re looking to apply your relevant experience to a new industry, join our team as we help shape a brighter way forward.   <h4>Position Overview</h4>We are seeking an experienced Project Lead specializing in structured cabling and data infrastructure to serve as the Single Point of Contact (SPOC) for complex IT cabling projects. This role requires expertise in passive IT systems, network infrastructure design, and project management to deliver high-quality cabling solutions within approved timeframes, budgets, and quality standards.<h4>Key Responsibilities</h4><h4>Project Management &amp; Leadership</h4>• Serve as SPOC for clients and manage overall project relationships throughout the project lifecycle • Lead project governance including project briefs, execution plans, risk registers, quality plans, and project schedules • Develop and maintain master programs including sequencing and phasing for structured cabling installations • Coordinate regular liaison between internal teams and external contractors for project schedule alignment • Chair key meetings and participate in Project Control Group (PCG) meetings • Manage centralized communication, reporting, and weekly stakeholder meetings<h4>Engineering &amp; Design Coordination</h4>• Coordinate with engineering teams for network cabling design including:<ul><li>IT equipment spaces design, rack layouts, and structured cabling routes</li><li>Data ports matrix covering workspaces, common areas, and meeting rooms</li><li>Fiber interconnectivity between cable rooms and buildings • Review layout plans for premises, furniture, and electrical requirements to ensure client engineering standards compliance • Coordinate with security system design teams and appointed vendors for cable routing, power, and space requirements • Oversee design responsibility and approve System Integrator submissions including shop drawings, execution plans, and quality manuals</li></ul><h4>Procurement &amp; Vendor Management</h4>• Manage procurement schedules and support tendering processes in coordination with client procurement teams • Assist in vendor pre-qualification and finalize potential bidder lists • Coordinate with cost consultants for RFP documentation and release to prequalified System Integrators • Manage tender events, coordinate vendor meetings/presentations, and support technical recommendations<h4>Implementation &amp; Quality Management</h4>• Oversee complete construction activities and day-to-day site work execution • Coordinate vendor mobilization and construction kickoff meetings • Provide construction supervision for cabling infrastructure, communications rooms, and power installations • Conduct site inspections and quality audits alongside consultants • Issue and track Non-Conformance Reports (NCRs) for quality observations • Manage vendor submissions and approvals through engineering teams for testing, calibration, and certifications • Coordinate with third-party contractors for smart building systems, TMS/BMS/MEP/AV data points and connectivity<h4>Project Closeout &amp; Documentation</h4>• Ensure smooth project handover with proper snag/punch list tracking • Coordinate handover documentation including O&amp;M manuals, warranties, as-built drawings, and test reports • Manage system rectifications and defect liability periods • Provide full system documentation management including test results and product manuals • Coordinate training for facility technicians and system administrators • Submit comprehensive project closeout reports<h4>Required Qualifications</h4>• Bachelor's degree in Engineering, Telecommunications, or related field • Minimum 8-10 years of experience in structured cabling and data infrastructure projects • Strong knowledge of passive IT systems, network cabling standards, and telecommunications infrastructure • Experience with project management methodologies and stakeholder management • Proven track record in vendor management and procurement processes • Knowledge of quality management systems and audit processes<h4>Preferred Skills</h4>• Professional certifications in project management (PMP) or telecommunications (RCDD) • Experience with smart building technologies and integrated systems • Strong communication and leadership abilities • Proficiency in project management software and reporting toolsThis role offers the opportunity to lead complex structured cabling projects from conception to completion while working with cutting-edge telecommunications infrastructure and building technologies.Location: On-site –Mumbai, MHScheduled Weekly Hours:48If this job description resonates with you, we encourage you to apply even if you don’t meet all of the requirements.  We’re interested in getting to know you and what you bring to the table!JLL Privacy NoticeJones Lang LaSalle (JLL), together with its subsidiaries and affiliates, is a leading global provider of real estate and investment management services. We take our responsibility to protect the personal information provided to us seriously. Generally the personal information we collect from you are for the purposes of processing in connection with JLL’s recruitment process. We endeavour to keep your personal information secure with appropriate level of security and keep for as long as we need it for legitimate business or legal reasons. We will then delete it safely and securely.For more information about how JLL processes your personal data, please view our <a href='\"https://www.us.jll.com/en/careers/candidate-privacy-statement\"' target='\"_blank\"'>Candidate Privacy Statement</a>.For additional details please see our career site pages for each country.For candidates in the United States, please see a full copy of our Equal Employment Opportunity policy <a href='\"https://www.us.jll.com/en/careers/disclaimers\"' target='\"_blank\"'>here</a>.Jones Lang LaSalle (“JLL”) is an Equal Opportunity Employer and is committed to working with and providing reasonable accommodations to individuals with disabilities.  If you need a reasonable accommodation because of a disability for any part of the employment process – including the online application and/or overall selection process – you may email us at <a href='\"mailto:HRSCLeaves@jll.com\"' target='\"_blank\"'>HRSCLeaves@jll.com</a>. This email is only to request an accommodation. Please direct any other general recruiting inquiries to our <a href='\"https://www.us.jll.com/en/contact-us\"' target='\"_blank\"'>Contact Us</a> page &gt; I want to work for JLL.

Jones Lang Lasalle Property Consultants India Pvt Ltd

Project Lead

Design Verification Engineer This job might be for you if<ul><li>You enjoy solving problems. You love taking on difficult challenges and finding creative solutions.</li><li>You don’t know the answer but will dig until you find it.</li><li>You communicate clearly. You write well.</li><li>You are motivated and driven. You volunteer for new challenges without waiting to be asked. You will take ownership of the time you spend with us and make a difference.</li><li>You can impress our customers with your enthusiasm to solve their issues (and solve them!)</li></ul> Job OverviewWe are seeking an experienced and highly skilled Senior SOC Design Verification Engineer with a minimum of 5 years of hands-on experience in SOC Design Verification. As a key member of our team, you will play a pivotal role in ensuring the robustness and correctness of our cutting-edge System on Chip designs. Job Description<ul><li>Lead and manage SOC Design Verification efforts for complex projects, ensuring the successful execution of verification plans.</li><li>Develop and implement comprehensive verification strategies, test plans, and test benches for high-speed SOCs, including low-speed peripherals like I2C/I3C, SPI, UART, GPIO, QSPI, and high-speed protocols like PCIe, Ethernet, CXL, MIPI, DDR and HBM</li><li>Conduct Gate-level simulations, and power-aware verification using Xprop and UPF.</li><li>Collaborate closely with cross-functional teams, architects, designers, and pre/post-silicon verification teams.</li><li>Analyze and implement System Verilog assertions and coverage (code, toggle, functional).</li><li>Provide mentorship and technical guidance to junior verification engineers.</li><li>Manage and lead a dynamic team of verification engineers, fostering a collaborative and innovative work environment.</li><li>Ensure verification signoff criteria are met and documentation is comprehensive.</li><li>Demonstrate dedication, hard work, and commitment to achieving project goals and deadlines.</li><li>Adhere to quality standards, implement good test practices, and contribute to the continuous improvement of verification methodologies.</li><li>Experience with verification tools from Synopsys and Cadence, including VCS and Xsim. Integration of third-party VIPs (Verification IP) from Synopsys and Cadence.</li></ul> Qualifications<ul><li>Bachelor’s degree in computer science, Electrical/Electronics Engineering, or related field. OR</li><li>Master’s degree in computer science, Electrical/Electronics Engineering, or related field. OR</li><li>PhD in Computer Science, Electrical/Electronics Engineering, or related field.</li><li>5+ years of hands-on experience in SOC Design Verification.</li><li>Expertise in UVM (Universal Verification Methodology) and System Verilog.</li><li>Prior experience working on IP level and SOC level verification projects.</li><li>Proficient in verification tools such as VCS, Xsim, waveform analyzers, and third-party VIP integration (e.g., Synopsys VIPs and Cadence VIPs).</li><li>Hands-on experience with UFS (Universal Flash Storage), Ethernet, PCIe, CXL, MIPI protocols.</li><li>Solid understanding of low-speed peripherals (I2C/I3C, SPI, UART, GPIO, QSPI) and high-speed protocols.</li><li>Experience in DDR, HBM, Gate-level simulations, and power-aware verification using Xprop and UPF.</li><li>Proficiency in scripting languages such as shell, Makefile, and Perl.</li><li>Strong understanding of processor-based SOC verification, including native, Verilog, System Verilog, and UVM mixed environment.</li><li>C-System Verilog handshake and writing C test cases for bootup verification. Excellent problem-solving, analytical, and debugging skills.</li></ul>

Eximietas Design

Assistant Design Engineer

Design for Test Engineer Job DescriptionWe are seeking an experienced and highly skilled Senior SOC Design for Test Engineer with a minimum of 5 years of hands-on experience in SOC Design for Test. As a key member of our team, you will play a pivotal role in ensuring the testability, manufacturability, and quality of our cutting-edge System on Chip designs Key Responsibilities<ul><li>Lead and manage SOC Design for Test efforts for complex projects, ensuring the successful execution coverage, manufacturability, and quality plans.</li><li>Develop full chip and block level DFT implementation from the DFx Specifications and product coverage, quality, and manufacturability goals. Define and implement Test controllers at top level and block level, fuse controllers, test clocking strategy, chip I/O test strategy and HSIO test strategy.</li><li>Define JTAG TAP, boundary scan, I/O Test JTAG access, IEEE1687 iJTAG network and instrument design and implementation. Define the Test Interface for each of the P&amp;R IP blocks for Scan, MBIST and other test interfaces.</li><li>Define hierarchical block isolation, Test clocking and On Chip Clock controllers and reset methodology. Define scan and MBIST timing at the top level and block level timing.</li><li>Analyse block level RTL or gates to ensure that scalability and coverage is satisfied as per the design goals. Ensure that DFT is provided to fix the DFT violations to ensure that the design goals are meet.</li><li>Analyse compression requirements for each of the blocks, define Intest and Extest compression requirements and define the requirements for compression engines. Synthesize compression engines for each of the blocks. Create the collaterals for compression for the IPs.</li><li>Block level scan insertion as well as development of the scan wrappers for the blocks. Do scan insertion on the blocks, analyse scan DRC, implement DFT fixes. Create scan protocol files for designs, create scan inserted netlist, create scan definitions as well as scan definition files for PD. Perform ATPG on the scan inserted netlist, analyse DRC and coverage violations.</li><li>Deep knowledge of different scan models Stuck-at, transition test, path-delay, bridging, cell aware, small-delay transition, IDDQ test etc. Ability to analyse coverage for each of the model types.</li><li>Running GLS with or without timing for the scan vectors. Ability to debug the failures and working with timing and PD teams to fix the timing issues.</li><li>Understanding of pattern delivery to the post-silicon test engineering teams. Delivering to the Test engineering the Test pin muxing and other full chip requirements for the Test Engineering Team. Understanding tester requirements and delivering the patterns in the formats that the tester teams needs.</li><li>Implement pattern retargeting. Create grey box models for blocks. Coverage analysis of full chip consolidating Intest and Extest patterns. Knowledge of Top level scan architecture and creating flow to create pattern retargeting.</li><li>Knowledge of Streaming Scan Network and other Top level scan pin sharing and implementing the block to top level pattern generation for this flow.</li><li>Implementing Memory Testing and MBIST. Knowledge of Memory defect models and test algorithms. Knowledge of memory bit mapping and redundancy analysis. Implementing memory repair and fuse sharing among various memory.</li><li>Knowledge of LogicBIST with Test point insertion, X-blocking.</li><li>Full chip DFT delivery for tapeout including but not limited to DFT netlist verification, pattern delivery, Tester requirements.</li><li>Debug DFT patterns post silicon, ability to analyse chain test patterns for failures, scan pattern failures. Analyse MBIST pattern failures, yield and repair debug.</li><li>Ability to perform volume diagnostics on the parts to isolate and improve the patterns.</li></ul> Requirements<ul><li>Bachelor’s degree in computer science, Electrical/Electronics Engineering, or related field. OR master’s degree in computer science, Electrical/Electronics Engineering, or related field. OR PhD in Computer Science, Electrical/Electronics Engineering, or related field.</li><li>5+ years of hands-on experience in SOC Design for Test.</li><li>Expertise in DFT tools and flows in scan intertion, ATPG, GLS simulation, diagnosis flows.</li><li>Prior experience working on IP level and SOC level DFT projects.</li><li>Proficient in DFT tools from Siemens (Tessent), Synopsys DFTmax, Tetramax, Spyglass DFT advisor, Genius DFT, Modus, VCS, Xcelium etc.</li><li>Worked in full chip design or complex IP delivery in the area of DFT.</li><li>Experience in post silicon debug, diagnosis and yield enhancements is a plus.</li></ul>

Senior Test Engineer

Application DeveloperProject Role : Application Developer Project Role Description : Design, build and configure applications to meet business process and application requirements. Must have skills : Industry X Robotics Good to have skills : NA Minimum 7.5 year(s) of experience is required Educational Qualification : 15 years full time education Job Title: Robotics Associate Manager
Location: Bengaluru
 
Job Summary: We are seeking an experienced and dynamic Robotics Associate Manager to lead and oversee the development, design, and implementation of robotics systems for our [company's product/service]. As a Robotics AM, you will lead a team of engineers and collaborate closely with cross-functional teams to develop innovative robotic solutions that meet the needs of the business. This role requires strong technical expertise in robotics, and the ability to drive projects from concept to completion.
 
Roles &amp; Responsibilities:
-Lead a team of robotics engineers and technicians to design, prototype, and develop robotic systems and solutions.
-Manage the development lifecycle of robotics projects from initial concept, system design, testing, and deployment.
-Collaborate with other engineering teams, including software, hardware, and systems engineering, to ensure the seamless integration of robotics systems.
-Ensure that robotics systems meet safety standards, regulatory requirements, and performance specifications.
-Drive continuous improvement in robotics system performance, scalability, and cost-effectiveness.
-Mentor and coach team members, providing guidance and fostering a culture of innovation and problem-solving.
-Manage project timelines, resources, and budgets to ensure successful and on-time delivery of robotics projects.
-Develop and implement testing protocols for robotic systems to ensure functionality, reliability, and safety.
-Stay up to date with industry trends, emerging technologies, and advancements in robotics to help guide the team toward best practices.
-Work with product management and other stakeholders to define product requirements and align the robotics development efforts with business goals.
-Provide technical leadership and resolve complex engineering challenges throughout the development process.
-Oversee the documentation of engineering designs, processes, and specifications.

Professional &amp; Technical Skills:
-Bachelor's or Master's degree in Robotics, Mechanical Engineering, Electrical Engineering, Computer Science, or a related field.
-10+ years of experience in robotics development.
-Strong knowledge of robotic hardware, sensors, actuators, and control systems.
-Experience with robotics programming languages such as ROS (Robot Operating System), Python, C++, or similar.
-Proficiency in robotic simulation tools and CAD software.
-Familiarity with machine learning, computer vision, and AI technologies applied to robotics is a plus.
-Proven experience managing and leading cross-functional teams.
-Excellent problem-solving skills and a hands-on approach to project management.
-Strong communication skills and ability to present complex technical concepts to non-technical stakeholders.
-Experience in developing and managing budgets and timelines for engineering projects.
-Knowledge of industry standards, safety regulations, and compliance requirements in robotics.

Additional Info:
- The Candidate should have experience with industrial automation or robotic manufacturing systems, as well as familiarity with cloud computing and data analytics in the context of robotics.
- This position is based at our Bengaluru office.
- A 15 years full time education is required.

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