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Linux Device Driver Developer Capgemini is hiring for Linux Device Driver Developer (LDD) can join in 30 Days, and possess the required skill set, apply to this job. Experience: 4- 10 years Key Requirements:1. 3-5 Yrs of experience in Embedded Linux Kernel/Drivers domain2. Embedded Software development and porting on Linux and ARM platforms3. Strong Programming skills on C &amp; Data Structures4. Expertise on OS (Memory Mgmt, Scheduling, IPC, Multi-threading/processing)5. Experience in Linux Kernel/Device Drivers6. Proficiency in debugging embedded systems, including using tools like JTAG7. Understanding of System architecture and debugging at a system level. Please send your resume with the following details:Subject Line: Job Application- LDD (Linux Device Drivers)Name:Total Exp:Rel exp:Current CTC:ECTC:Current location:Are you willing to relocate?Notice period/ LWD:

Capgemini

Linux Engineer

BIM Coordinator We’re seeking talented minds&nbsp;who thrive on clarity, collaboration, and long-term impact. Step into work that matters. • Experience - 8+ years What You'll Gain• Projects at grand scale.• Guidance that sharpens your craft.• A culture that balances creativity with growth. Send your updated CV &amp; portfolio&nbsp;now.

Edifice Consultants

Senior Architect

Principal Engineer We are hiring Principal Engineer (Network Domain)<ul><li>Location: Bangalore (Work from Office)</li><li>Notice period: Immediate joiners up to 60 days</li><li>Experience : 10+years</li></ul> Share your updated cv to <a rel="noopener noreferrer" href="\&quot;mailto:neetika_yadav@onwardgroup.com\&quot;" target="_blank">neetika_yadav@onwardgroup.com</a>

Onward Technologies Limited

Chief Engineer

Tech Lead-NX Customization <ul><li>Experience - 8+ Years</li><li>Skills set - NX Customization NXAPI with C++&nbsp;</li></ul> Share your updated resume now.

Neilsoft Ltd

Automation Integration Engineer

ASIC Physical Design Tools Flows & Methodology Lead THE ROLE:&nbsp;As a Silicon Design Engineer in the AMD AECG ASIC TFM (tools Flows Methodology) team, you will work with design experts (FE and BE) to come up with the best implementation methodologies/flows and work on development and support of the FE/BE flows.&nbsp;KEY RESPONSIBILITIES:&nbsp;<ul><li>Define and drive key Frontend/Beckend/Physical Design methodologies.</li><li>Partner with AMD CAD Teams, Design team, physical design teams to ensure seamless end to end design flows.</li><li>Work with existing development teams to define roadmaps for existing flows and assist in difficult technical debug.</li><li>Work closely with design teams to gather requirements and develop strategies to tackle key technical problems.</li><li>Work on Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC &amp; LVS), Crosstalk Analysis, EM/IR</li><li>Handling different PNR tools - Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk</li></ul>&nbsp;PREFERRED EXPERIENCE:&nbsp;<ul><li>8+ years of professional experience in physical design, preferably with high performance designs.</li><li>Experience in automated synthesis and timing driven place and route of RTL blocks for high speed datapath and control logic applications.</li><li>Experience in automated design flows for clock tree synthesis, clock and power gating techniques, scan stitching, design optimization for improved timing/power/area, and design cycle time reduction.</li><li>Experience in floorplanning, establishing design methodology, IP integration, checks for logic equivalence, physical/timing/electrical quality, and final signoff for large IP delivery</li><li>Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality, familiarity with tools for schematics, layout, and circuit/logic simulation</li><li>Versatility with scripts to automate design flow.</li><li>Strong communication skills, ability to multi-task across projects, and work with geographically spread out teams</li><li>Excellent physical design and timing background.</li><li>Strong analytical/problem solving skills and pronounced attention to details.</li></ul>

Amd India Private Limited

Embedded Software Developer

Software Test Engineer, Embedded Systems, Silicon<h4>Minimum qualifications:</h4><ul><li>Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.</li><li>8 years of experience with experience in hardware or embedded testing/automation role.</li><li>Experience testing embedded software on SoC on Linux, Android or RTOS including hardware (HW) architecture, board schematics, protocols and standards.</li></ul> <h4>Preferred qualifications:</h4><ul><li>Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.</li><li>Experience in Linux kernel driver test automation and framework development.</li><li>Experience in working with prototype devices and Android application development.</li><li>Excellent programming skills in modern Python.</li><li>Excellent programming skills in Java, C/C++, JNI.</li></ul><h4>About the job</h4>Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.<h4>Responsibilities</h4><ul><li>





Ownership of delivering exceptional software quality for one or more IPs within silicon software</li><li>





Create and implement test strategies by working with development teams to identify risk areas and fill the testing gaps</li><li>Engrain Product and Engineering Excellence as a core value in test engineering and our associated development partners</li><li>





Triage and analyze test results and incoming feedback to identify areas for improvement</li><li>





Guide, mentor, and coach other team members with regards to process technology</li></ul><h4>Experience Level</h4>Senior Level

Google India Pvt Ltd

Software Test Engineer

Proposals EngineerJob Summary:Engaging with the Emerson Sales team and crafting professional proposals that address customer needs while highlighting the advantages of partnering with Emerson. In this Role, Your Responsibilities Will Be:<ul><li>Engaging with Sales Team - Collaborate closely with the Sales team. Understand their insights, customer interactions, and market dynamics. Effective communication is key.</li><li>Leading Diamond Model Collaborators - As a leader, guide the team throughout the proposal execution process. Ensure alignment with strategic goals.</li><li>Developing Execution Strategies - Supply to the development of execution strategies. These strategies should align with the overall business objectives.</li><li>Customer Enquiries and Specifications - Receive and interpret customer enquiries. Understand their specifications and challenges. Tailor proposals accordingly.</li><li>Collaboration with Operations and Suppliers - Work closely with Operations organization, Engineering centers, and Third-party suppliers. Review proposal strategies together.</li><li>PMO Proposal Workflow - Enforce guidelines, and procedures. Consistency streamlines execution.</li><li>Vendor RFQ and Quote Evaluation - Independently handle vendor Requests for Quotation (RFQ) and evaluate quotes. Make informed decisions.</li><li>Local Weights and Measures (WTs) - Be aware of local Weights and Measures requirements. Compliance is essential.</li><li>Contribute to Proposals initiatives to improve process efficiency, help avoiding repetitive mistakes and improve turn around.</li><li>Support new members development and bringing them onboard.</li><li>Engage in cross function initiatives, connect with cross function leaders and help resolving issues boosting collaboration between different functions.</li></ul>Who You Are:You show a tremendous amount of initiative in tough situations; is exceptional at spotting and seizing opportunities. You actively seek guidance from pertinent sources to make timely and well-informed decisions. You articulate messages in a way that is broadly understandableFor This Role, You Will Need:<ul><li>Good knowledge in application of various types of meters, analyzers and key product types and applications for gas &amp; liquids measurement. Proven understanding of applicable industry codes and standards such as ASME, ANSI, API, API MPMS, ISO &amp; other industry standards related to solutions.</li><li>Proficiency to be able to size flow meter and valves.</li><li>Good communication and interpersonal skills.</li><li>Good analytical skills and committed.</li><li>Flexibility to learn new things and understand different cultures.                         </li></ul>Preferred Qualifications that Set You Apart:<ul><li>BE/B.Tech in Instrumentation, Mechanical Engineering.</li><li>02 to 10 years of experience in segment specific applications, preferred experience in leading concurrent mid complexity proposals.</li><li>Participate in Buddy Program and coach newly joined team members. </li><li>Good knowledge about MS-Office applications.</li></ul> Our Culture &amp; Commitment to YouAt Emerson, we prioritize a workplace where every employee is valued, respected, and empowered to grow. We cultivate an environment that encourages innovation, collaboration, and diverse perspectives—because we know that great ideas come from great teams. Our commitment to ongoing career development and growing an inclusive culture ensures you have the support to thrive. Whether through mentorship, training, or leadership opportunities, we invest in your success so you can make a lasting impact. We believe diverse teams, working together are key to driving growth and delivering business results. We recognize the importance of employee wellbeing. We prioritize providing competitive benefits plans, a variety of medical insurance plans, Employee Assistance Program, employee resource groups, recognition, and much more. Our culture offers flexible time off plans, including paid parental leave (maternal and paternal), vacation and holiday leave.<h4>Experience Level</h4>Senior Level

Emerson Electric Company India Pvt Ltd

Engineering Consultant

FPGA Design Engineer Job Descriptions &amp; RequirementsFPGA Design Engineer will be working on our existing and next generation Protocol Analysers and similar products.• Opportunity to develop a new product to top 10 semiconductor companies to test their next generation products• The role involves contributing to the entire FPGA based product development flow starting from requirement analysis till final product testing in lab environment.• The candidate will be responsible for architecture/micro-architecture design and implementation of the logic in Verilog for targeted FPGA, writing test benches to validate the design etc.• Job involves frequent interaction with board design, software, testing and lab teams to deliver the product meeting the customer requirements.• Job involves understanding and working with interfaces such as PCIe, GigE, MPHY/UFS, DPHY/CSI/DSI, USB, SD, eMMC, I3C/I2C, SPI/QSPI etc.• Contributing to/participating in internal design reviews to ensure adherence to the company FPGA design process. Requirement:Experience in designing and implementing FPGA based solution in Xilinx or Altera FPGA, preferably FPGA based product development experience.• Must have experience in System Design with Xilinx/Altera FPGA devices with relevant tools.• Must have experience in Verilog and/or VHDL coding.• Must have experience in using constraints to achieve timing requirement.• Experience in working on high speed FPGA designs is a major plus.• Thorough knowledge of Static Timing Analysis (STA) is an added advantage.• Must have experience in building test bench for verification.• knowledge in any of the protocols like UFS, UniPro, USB, Ethernet, PCIe, I3C, I2C, SPI, QSPI, UART, JTAG, SPMI, RFFE, SD, eMMC etc.• Must have hands on experience with FPGA debugging tools and test &amp; measurement instruments such as oscilloscope and Logic Analyzer.• Should have strong problem solving and debugging skills. ﻿Experience:&nbsp;3-10 Years

Modernize Chip Solutions

Embedded Systems Engineer

SoC Design Engineer Job Descriptions &amp; RequirementsThis person will be part of the next generation Design team. Requires strong hands-on knowledge of all facets of the SOC design process and good understanding of SOC Architecture. Key Responsibilities:• Strong knowledge in IP/SOC design methodologies.•Sound knowledge of RTL/SOC design/integration with Verilog/system Verilog• Strong experience in Synthesis, timing, full chip netlist &amp; front-end design tools&amp; flows Low power design• Mentoring juniors and enhancing their skill set• Must have strong knowledge of AMBA AHB/AXI protocol• Working knowledge on code coverage, functional coverage, Lint, CDC etc• IP development and coding using standard coding guide lines knowledge• Excellent communication skills. Must be able to participate &amp; lead in global meetings• Soft skills to be able to work in a cross functional international team digital and software design engineers Preferred Experience:• 4-10 years of RTL design, ArchitectureSOC implementation experience:• Ability to work well in a dynamic, fast-paced, pressure filled environment.

PD Engineer Experience:&nbsp;3-8 YearsPosition Requirements• Experienced with ASIC design flow, hierarchical physical design strategies, and methodologies and understand deep sub-micron technology issues.• Solid knowledge on LP Design, static timing analysis, EM/IR-Drop/crosstalk analysis, physical verification, DFM.• Successful track records of taping out complex, 16nm/10nm/7nm/5nm/3nm SOC chips.• Automation and programming-minded, solid coding experience in Tcl/Perl/Python.• Innovative, self-motivated, able to work independently or as a team player, excellent verbal and written communication skills in English.• Strong timing analysis skills.• Strong physical implementation flow debugging skills.• Strong scripting skills.

Junior Mechanical Engineer

STA Engineer Skills requried:• In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floorplanning, Power Grid Design, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification, Chip finishing. Should have experience on Physical Design Methodologies and lower technology nodes.• Should have experience on programming in Tcl/Tk/Perl to automate design process and improve efficiency.• Must have hands-on experience on PnR Suite from Synopsys/Cadence (Innovus, ICC2)• Strong experience on Static Timing Analysis (PrimeTime – SI), EM/IR-Drop analysis (PT-PX, Redhawk), Physical Verification (Calibre).• Understanding the practical application of methodologies and Physical Design Tools, Flow Automation and Improvements.• Experience in complex SOC integration, Low Power and High Speed Design and Advanced Physical Verification Techniques. Experience:&nbsp;3-8 Years

Associate Engineer

Principal ASIC Digital Design Engineer<h4>
 
 General Information
 </h4>






 Job Title
 

 Principal ASIC Digital Design Engineer
 



 Job ID
 

 12204
 



 Country
 

 India
 



 City
 

 Bangalore
 



 Date Posted
 

 14-Jul-2025
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 ASIC Digital Design
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

<h4 id="isPasted">Job Titles:<ul><li>Principal ASIC Digital Design Engineer</li></ul><h4>We Are:</h4>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.<h4>You Are:</h4>You are a highly experienced digital design professional with a strong track record in architecting and implementing complex RTL-based IP Cores. With a deep passion for solving intricate technical challenges, you bring over 15 years of hands-on experience in ASIC design and development, specifically within the context of high-performance, low-power, and robust system-on-chip (SoC) solutions. You thrive in dynamic, globally distributed teams, and you’re motivated by the opportunity to work on next-generation technologies that enable breakthroughs in AI, machine learning, automotive, and cloud infrastructure.You are detail-oriented and methodical, with the ability to translate high-level requirements into precise micro-architectures and design specifications. Your expertise spans multiple industry-standard protocols (such as DDR, PCIe, AMBA, Ethernet, USB, and MIPI), and you are adept at leveraging industry-leading EDA tools for simulation, synthesis, and formal verification. You are proactive, capable of working independently, and always seeking opportunities to innovate and drive technical excellence. Your communication skills enable you to collaborate effectively with cross-functional teams, mentor junior engineers, and articulate complex technical concepts clearly. With a growth mindset, you are eager to continue expanding your skills in safety standards, design automation, and emerging technologies.<h4>What You’ll Be Doing:</h4><ul><li>Translating standards and functional specifications into detailed architecture and microarchitecture specifications for advanced digital IP Cores.</li><li>Making critical architectural decisions and leading the development of complex RTL designs from concept through implementation.</li><li>Collaborating with verification teams to define and refine verification plans, and supporting the creation of robust test strategies.</li><li>Writing high-quality Verilog/System Verilog code and using simulation tools to validate design functionality and performance.</li><li>Driving synthesis, static timing analysis, lint, and CDC/formal checking flows to ensure design quality and compliance with stringent requirements.</li><li>Providing technical leadership and mentoring to other team members, fostering a culture of continuous learning and innovation.</li><li>Engaging with cross-site, international teams to deliver IP solutions optimized for server, AI/ML, automotive, and other end-customer applications.</li></ul><h4>The Impact You Will Have:</h4><ul><li>Enable Synopsys’ customers to accelerate time-to-market with differentiated, high-performance SoC solutions.</li><li>Contribute to the world’s broadest portfolio of silicon IP, supporting a wide range of applications from cloud servers to autonomous vehicles.</li><li>Raise the bar for design quality and reliability by implementing industry best practices in verification, synthesis, and safety.</li><li>Drive innovation in digital design methodologies and IP core architectures, influencing the direction of future product development.</li><li>Mentor and upskill team members, cultivating technical excellence and collaborative problem-solving within the team.</li><li>Play a key role in Synopsys’ global Solutions Group, delivering complex IPs that power next-generation technologies.</li></ul><h4>What You’ll Need:</h4><ul><li>Bachelor’s or Master’s degree in Electrical/Electronics Engineering, with 15+ years of relevant experience in ASIC digital design.</li><li>Deep knowledge of one or more protocols: DDR, PCIe, AMBA (AMBA2, AXI, CHI), SD/eMMC, Ethernet, USB, MIPI.</li><li>Hands-on expertise in Verilog/System Verilog coding, simulation, and advanced EDA tools.</li><li>Strong proficiency in synthesis flow, static timing analysis, lint, CDC, and formal checking methodologies.</li><li>Experience in developing micro-architecture and detailed design from functional specifications.</li><li>Familiarity with scripting languages (C/C++, TCL, Perl, Python) is a plus.</li><li>Understanding of functional safety standards (ISO26262, FMEDA) and prior exposure to SVA/formal verification tools is advantageous.</li></ul><h4>Who You Are:</h4><ul><li>A proactive self-starter with a passion for technical innovation and solving challenging design problems.</li><li>Detail-oriented, precise, and committed to delivering high-quality, robust solutions.</li><li>Effective communicator, able to collaborate across geographies and functions.</li><li>Team player who enjoys mentoring and knowledge sharing.</li><li>Comfortable working independently and making informed architectural decisions.</li><li>Adaptable and eager to learn new technologies and methodologies.</li></ul><h4>The Team You’ll Be A Part Of:</h4>You will join the Solutions Group at our Bangalore Design Center, a collaborative and innovative team focused on developing industry-leading RTL-based IP Cores. The team works closely with architects, designers, and verification experts worldwide, delivering IP for a diverse set of high-impact applications. Our culture emphasizes technical excellence, continuous learning, and cross-functional teamwork to empower each member to contribute meaningfully to Synopsys’ mission.<h4>Rewards and Benefits:</h4>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</h4>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.<h4>Experience Level</h4>Senior Level

Synopsys India Pvt Ltd

Mechanical CAD Designer

Senior SERDES Design Engineer<h4>
 
 General Information
 </h4>






 Job Title
 

 Senior SERDES Design Engineer
 



 Job ID
 

 12391
 



 Country
 

 India
 



 City
 

 Hyderabad
 



 Date Posted
 

 28-Jul-2025
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 Analog Design
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

<h4 id="isPasted">We Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.<h4>You Are:</h4>You are a highly motivated, detail-oriented, and technically adept engineer with a passion for analog and mixed-signal IC design. With a strong foundation in CMOS technology and a keen interest in high-speed circuit architectures, you thrive in fast-paced, collaborative environments where innovation and precision are paramount. You are curious, proactive, and always eager to explore the latest advancements in semiconductor design, particularly within the SERDES domain. Your approach to problem-solving is both analytical and creative, allowing you to devise robust solutions to complex challenges.What You’ll Be Doing:<ul><li>Designing, developing, troubleshooting, and debugging multi-Gb/s SERDES IP for a variety of high-performance applications.</li><li>Translating SerDes standards and block specifications into innovative circuit architectures and effective design strategies.</li><li>Collaborating closely with a cross-functional team of analog and digital designers from diverse backgrounds to deliver integrated solutions.</li><li>Utilizing a comprehensive suite of IC design tools, enhanced by proprietary in-house tools, to optimize design workflows and outcomes.</li><li>Ensuring all designs adhere to stringent performance, reliability, and manufacturability requirements through rigorous analysis and validation.</li><li>Documenting design methodologies, processes, and results to foster knowledge sharing and support future engineering initiatives.</li></ul><h4> </h4><h4>The Impact You Will Have:</h4><ul><li>Contributing to the development of cutting-edge, high-speed analog integrated circuits that power the world’s most advanced technologies.</li><li>Enhancing the performance, reliability, and scalability of SERDES IP deployed in a wide range of industries and applications.</li><li>Driving innovation in analog and mixed-signal design, setting new standards for quality and efficiency.</li><li>Collaborating with a talented team to deliver world-class design solutions that support Synopsys’ leadership in the semiconductor industry.</li><li>Supporting Synopsys' analog and mixed-signal R&amp;D initiatives, helping to shape the direction of future product development.</li><li>Ensuring seamless integration of analog and digital components in complex system-on-chip (SoC) environments.</li></ul><h4> </h4><h4>What You’ll Need:</h4><ul><li>2-4 yrs relevant experience with BTech / MTech </li><li>In-depth familiarity with transistor-level circuit design and CMOS design fundamentals.</li><li>Hands-on exposure to SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, ADC, BGR, regulators).</li><li>Awareness of ESD (electrostatic discharge) issues and circuit techniques for effective mitigation.</li><li>Experience with custom digital design tailored for high-speed logic paths.</li><li>Solid understanding of design for reliability (e.g., EM, IR, aging) and layout effects (e.g., matching, proximity effects).</li><li>Proficiency in industry-standard custom design tools such as Cadence, HSPICE, PRIMESIM, and Ultrasim.</li><li>Experience with scripting languages for simulation post-processing (e.g., TCL, PERL, MATLAB).</li><li>Familiarity with system-level budgeting for jitter, amplitude, noise, etc.</li><li>Awareness of signal integrity issues, including packaging effects, board parasitics, crosstalk, and noise.</li></ul><h4> </h4><h4>Who You Are:</h4><ul><li>Collaborative, open-minded, and respectful of diverse perspectives.</li><li>Excellent communicator with the ability to convey complex technical concepts clearly.</li><li>Self-driven, proactive, and comfortable working independently as well as in a team setting.</li><li>Analytical thinker with strong problem-solving abilities and attention to detail.</li><li>Adaptable to changing priorities and able to thrive in a dynamic, innovation-driven environment.</li><li>Committed to continuous learning and professional growth.</li></ul><h4> </h4><h4>The Team You’ll Be A Part Of:</h4>You will be joining a world-class team of analog and mixed-signal design experts dedicated to developing high-performance SERDES IP. The team values innovation, collaboration, and a culture of knowledge sharing. You’ll work alongside passionate engineers and leverage the support of experienced software and CAD professionals, all united by a shared commitment to excellence and technological advancement.<h4>Rewards and Benefits:</h4>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</h4>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.<h4>Experience Level</h4>Senior Level

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