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Memory Characterization Engineer<h4>
 
 General Information
 </h4>






 Job Title
 

 Memory Characterization Engineer
 



 Job ID
 

 12439
 



 Country
 

 India
 



 City
 

 Noida
 



 Date Posted
 

 05-Aug-2025
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 R&amp;D Engineering
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

<h4>We Are:</h4>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.<h4>You Are:</h4>You are a passionate and experienced engineer eager to make a significant impact in the world of embedded memory development and characterization. With a strong academic background in Electrical &amp; Electronics Engineering and at least 2 years of hands-on experience in VLSI design and characterization, you thrive in collaborative, innovative environments. You possess a deep understanding of SRAM and Register File architectures, and you are well-versed in the nuances of advanced custom circuit implementation and their characterization, especially at the most advanced technology nodes such as FinFET and submicron processes. Your expertise in scripting and automation, combined with a solid grasp of both digital and analog fundamentals, empowers you to tackle complex challenges and deliver high-quality, efficient solutions.You are a creative problem-solver who welcomes technical challenges and approaches them with curiosity and determination. Your communication skills, adaptability, and ability to work seamlessly across teams make you a valued collaborator. You are committed to continuous learning and excited by the prospect of working at the intersection of technology and innovation. As an advocate for best practices and a mentor to junior engineers, you foster an environment of growth and inclusion. Your commitment to excellence, quality, and customer focus ensures that you deliver solutions that exceed expectations and contribute meaningfully to Synopsys' leadership in the semiconductor industry.<h4>What You’ll Be Doing:</h4><ul><li>Conduct detailed characterization of SRAM devices, including timing, power, and reliability testing.</li><li>Develop and implement comprehensive test plans and methodologies for SRAM characterization.</li><li>Analyze characterization data to identify trends, anomalies, and areas for improvement.</li><li>Design and implement low-power, area-efficient embedded memory circuits and architectures, including SRAM and register files.</li><li>Collaborate with design engineers to refine SRAM designs based on characterization results.</li><li>Support the development of automated test setups and characterization tools to enhance efficiency.</li><li>Network with senior engineers across disciplines and locations to ensure optimal solutions and knowledge sharing.</li></ul><h4>The Impact You Will Have:</h4><ul><li>Contribute to the optimization of SRAM designs, leading to improved performance and reduced power consumption, critical for modern applications.</li><li>Enhance the efficiency of the characterization process, allowing for faster time-to-market for new products.</li><li>Influence product development decisions through data-driven insights, driving innovation and competitiveness in the market.</li><li>Foster innovation within the team, championing new ideas and approaches to complex characterization challenges.</li><li>Contribute to the development of cutting-edge embedded memory IP that powers the next generation of integrated circuits.</li><li>Uphold Synopsys' reputation for delivering high-quality, reliable, and innovative semiconductor IP to global customers.</li></ul><h4>What You’ll Need:</h4><ul><li>BE/B.Tech/ME/M.Tech/MS in Electrical &amp; Electronics Engineering from a recognized institute or university.</li><li>Minimum of 2 years of experience in SRAM design and characterization or related semiconductor roles.</li><li>Strong understanding of multiple aspects of memory characterization.</li><li>Strong understanding of CMOS fundamentals, SRAM architecture, and characterization methodologies.</li><li>Hands-on experience with characterization of FinFET and deep submicron technology nodes.</li><li>Mastery in scripting languages such as Perl and Python for automation and optimization.</li><li>Excellent problem-solving skills and attention to detail.</li><li>Strong communication and collaboration skills, with the ability to work effectively in a team environment.</li></ul><h4>Who You Are:</h4><ul><li>Analytical thinker with strong problem-solving skills and attention to detail.</li><li>Effective communicator who thrives in cross-functional, multicultural teams.</li><li>Proactive and self-driven, with a strong sense of ownership and accountability.</li><li>Flexible, adaptable, and eager to learn new technologies and methodologies.</li><li>Collaborative team player who values diversity and inclusion.</li><li>Customer-focused, with a commitment to delivering high-quality solutions on time.</li></ul><h4>The Team You’ll Be A Part Of:</h4>You will join the Embedded Memory and Logic Team in Noida, a dynamic group within the Solutions Group at Synopsys. The team is dedicated to the development of standard and custom embedded SRAMs and ROMs, providing both functional and physical memory views through cutting-edge memory compilers. With end-to-end responsibility for bit cell analysis, architecture design, characterization, and verification, the team thrives on innovation, collaboration, and technical excellence. You'll work alongside talented engineers who are passionate about advancing semiconductor technology and delivering world-class IP solutions to global customers.<h4>Rewards and Benefits:</h4>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.<h4>Experience Level</h4>Mid Level

Synopsys India Pvt Ltd

Test Engineer

MS Fabric Architect We are looking for immediate joiners who are open to working in a hybrid modelExperience - 10+ years Share your updated resume now.

Accion labs india pvt ltd

Textile Designer

Embedded Design Engineer Experience:&nbsp;3-8 Years You will be responsible for:• Design, develop, modify software for embedded systems• Board bring up, debug and integrate software on custom hardware• Device driver development and hardware enablement•Pre and Post silicon validation/verification Skills:• Strong C/C++ experience, bare metal programming• Strong experience with U-boot, Embedded Linux, RTOS• IPC, Synchronization Techniques, Multi Threading• Understanding of Yocto, Buildroot, Device Tree• Experience with Shell, Python or Pearl scripting• Comprehensive experience with NXP, STM32, Microchip MCUs and ColdFire, ARM architecture• Strong experience with Trace32, JTAG, GDB, Emulators and Compilers• Understanding of I2C, SPI, UART, PCI, CAN; At least one of the protocols.

Modernize Chip Solutions

Embedded Systems Engineer

Senior Staff Analog Design Engineer<h4>
 
 General Information
 </h4>






 Job Title
 

 Senior Staff Analog Design Engineer
 



 Job ID
 

 10827
 



 Country
 

 India
 



 City
 

 Hyderabad
 



 Date Posted
 

 21-Apr-2025
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 Analog Design
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

<h4 id="isPasted">We Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.<h4>You Are:</h4>You are a passionate and highly skilled engineer committed to advancing the field of high-speed analog design. You bring a wealth of experience in designing critical analog and mixed-signal blocks, particularly for cutting-edge PCIe 6 and PCIe 7 or SerDes PHY solutions. Your technical expertise encompasses transistor-level design, deep knowledge of CMOS (including finFET and SOI processes), and a proven ability to create robust high-speed building blocks—such as LDOs, Bandgap references, ADC/DACs, PLLs, and DLLs—that consistently meet rigorous performance, power, and area targets.You thrive in collaborative, multidisciplinary environments, where your clear communication and mentoring skills empower both peers and junior engineers to excel. Your proactive approach to problem-solving and your dedication to continuous improvement ensure that you stay at the forefront of technology trends. You are adept at analyzing and mitigating jitter, maintaining signal integrity, and ensuring compliance with demanding industry standards. Your experience with porting PHY designs across technology nodes demonstrates your adaptability and commitment to delivering high-quality, innovative solutions. You value documentation, knowledge sharing, and actively contribute to a culture of learning and technical excellence.Most importantly, you are excited to join a team that values diversity, encourages bold ideas, and is committed to shaping the future of high-speed connectivity. You see challenges as opportunities and bring a growth mindset to every project you undertake.<h4>What You’ll Be Doing:</h4><ul><li>Designing and developing advanced analog/mixed-signal blocks for PCIe 6 and PCIe 7 PHY architectures under the guidance of senior technical leaders.</li><li>Ensuring that all designs strictly adhere to PCIe protocol standards, optimizing for performance, power, and area efficiency.</li><li>Porting high-speed PHY designs to various technology nodes while maintaining signal integrity and maximizing performance.</li><li>Collaborating with cross-functional teams—including digital, verification, and layout groups—to successfully integrate analog circuits into complex SerDes PHY systems.</li><li>Implementing innovative verification strategies for high-speed analog/mixed-signal circuits using state-of-the-art simulation and modeling tools.</li><li>Working closely with layout teams to minimize parasitics, device stress, and process variation impacts on overall circuit performance.</li><li>Analyzing simulation and silicon measurement data to validate designs and ensure compliance with PCIe standards.</li><li>Mentoring junior engineers and promoting best practices in analog/mixed-signal design and verification.</li><li>Documenting design features, specifications, and test methodologies for future reference and team knowledge sharing.</li><li>Partnering with characterization teams to validate electrical performance of circuits in silicon and resolve technical challenges.</li></ul><h4>The Impact You Will Have:</h4><ul><li>Drive the development of next-generation PCIe 6 and PCIe 7 PHY designs, advancing high-speed interface technologies that power tomorrow’s data-driven world.</li><li>Ensure Synopsys’ analog/mixed-signal circuits exceed industry standards, reinforcing our reputation for technical excellence and innovation.</li><li>Facilitate seamless integration of analog circuits into sophisticated SerDes PHY systems, enhancing overall performance and reliability.</li><li>Mentor and develop junior engineers, fostering a collaborative and innovative team environment.</li><li>Lead successful porting of PHY designs across multiple technology nodes, delivering versatile and scalable solutions for diverse customer needs.</li><li>Strengthen verification and validation processes, resulting in robust, reliable, and high-performing analog/mixed-signal circuits.</li></ul><h4>What You’ll Need:</h4><ul><li>PhD with 3+ years, or MTech/MS with 7+ years of experience in analog/mixed-signal circuit design focused on high-speed interfaces such as PCIe 6/7 or SerDes PHY designs.</li><li>Proven expertise in transistor-level design of high-speed analog building blocks (e.g., LDOs, Bandgap references, ADC/DACs, PLLs, DLLs).</li><li>Demonstrated silicon experience in developing PHY circuits compliant with PCIe standards.</li><li>Strong background in high-speed SerDes AFE development, including CTLE and CDR design.</li><li>Experience designing high-speed SerDes transmitters and deep knowledge of equalization techniques (e.g., DFE, FIR filters, TX pre-emphasis).</li><li>Solid foundation in jitter budgeting analysis and expertise in minimizing jitter impact on signal integrity.</li><li>Experience porting PHY designs across different technology nodes and deep knowledge of CMOS, finFET, and gate-all-around processes.</li><li>Comprehensive understanding of the PCIe protocol, signal integrity, jitter performance, and high-speed clocking.</li><li>Ability to collaborate with layout teams to minimize parasitics, process variations, and electromigration effects.</li><li>Proven track record of effective teamwork and successful project outcomes across multidisciplinary teams.</li></ul><h4> </h4><h4>Who You Are:</h4><ul><li>Innovative thinker with a passion for high-speed analog design and technology advancement.</li><li>Collaborative team player who values diversity and inclusion.</li><li>Effective communicator, able to translate complex technical concepts to a variety of audiences.</li><li>Mentor and coach, eager to support the development of junior engineers.</li><li>Detail-oriented problem solver with a commitment to quality and continuous improvement.</li><li>Adaptable and resourceful, thriving in fast-paced, changing environments.</li></ul><h4>The Team You’ll Be A Part Of:</h4>You will join a world-class analog/mixed-signal design team at Synopsys, focused on developing high-speed interface IP for next-generation semiconductor products. The team is composed of passionate engineers from diverse backgrounds, collaborating closely to deliver innovative solutions that drive the future of connectivity. Our culture emphasizes technical excellence, knowledge sharing, and continuous learning, providing an environment where your skills and ideas are valued and your career can thrive.<h4>Rewards and Benefits:</h4>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</h4>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.<h4>Experience Level</h4>Senior Level

Electronic Engineer

PCB Design Engineer Job Description<ul><li>Utilize ECAD tools, such as Allegro/Xpedition software, with expertise to execute Layout Engineering.</li><li>Analyse technical requirements and customer input to develop PCB layouts.</li><li>Experience in designing layouts for motherboards using Intel, AMD, NXP, TI processors is a significant advantage.</li><li>Familiarity with design guidelines from PDG and their implementation is a plus.</li><li>Thorough knowledge of relevant IPC design standards for Library creation, PCB design, and Schematic Entry.</li><li>Proficient in PCB layout placement, including analog, digital, power, and high-speed circuitry.</li><li>Experience in high-speed net routing and the utilization of blind &amp; buried vias.</li><li>Knowledge of tab routing is considered beneficial.</li><li>Ability to handle physical, spacing, and electrical constraint settings.</li><li>Independently interpret and understand schematics.</li><li>Awareness of Signal Integrity and Power Integrity concepts for PCB Design.</li><li>Collaborate with PCB manufacturers and assembly houses to comprehend manufacturing rules.</li><li>Self-motivated and capable of working independently with minimal supervision.</li><li>Proficient in creating documentation related to PCB Guidelines, Processes, and Checklists.</li><li>Understanding of thermal impact for design placement.</li><li>Strong expertise in DFM, DFA, DFS, and DFT analysis.</li><li>Competence in Gerber and ODB++ generation and review.</li></ul> Requirements<ul><li>Experience with high pin count, fine pitch parts, QFN modules, BGAs, connectors, power modules, heatsinks/clips, and SFF-TA-XXX specifications and connectors.</li><li>Knowledgeable about PCB layout guidelines and standards, with a background in PCB layout design highly desirable.</li><li>Demonstrates a timely response, high accuracy, precision, and great attention to detail.</li><li>Self-motivated team player, adaptable to varying workloads and task requirements.</li></ul> Education<ul><li>Bachelor's degree in Electronics/Electrical Engineering.</li></ul> Work Expereince<ul><li>5-8 years</li></ul>

Netweb Technologies

Lead Engineer – Core Wireless Testing (AMF/MME) What You Work:As a Lead Engineer you will be responsible for driving technical projects, managing resources effectively, balancing team workloads. You will design solutions, oversee testing, and mentor junior engineers to ensure productivity and skill development. Also, you will manage resources, troubleshoot, debug issues, writing and reviewing test cases to ensure code quality, and collaborate with cross-functional teams to deliver high-quality products on time.<ul><li>Knowledge of software development methodology, build tools, and product life cycle</li><li>Build a 5G Cloud-native test solution in a virtualized environment with end to end understanding of 5G Network functions (i.e., AMF, SMF, UPF and PCF) and protocols</li><li>Exposure to customer deployment models and configuration of large mobile packet core solutions</li><li>Have 4-12 years of Industry experience in Mobile packet core technologies with validation background and solid exposure in automation</li><li>You have End to End or System Testing background</li><li>Good knowledge in Kubernetes, docker and Cloud Native solutions</li><li>Experience in bringing up Open stack , VMWare based test setups</li><li>Interest &amp; Passion in Automation and framework development using Python and Robot Framework</li><li>Exposure in Spirent Landslide, Mobilium DsTest or Ixia simulators</li><li>Exposure in automation frameworks like pyats and robot framework.</li><li>Certification in Kubernetes, Exposure to Grafana and Prometheus is added advantage.</li><li>Experience in CI/CD tools Jenkins and GIT</li></ul> Mandatory skills:<ul><li>Solid experience in 5G core End to End validation</li><li>Kubernetes, Docker, OpenStack</li><li>Working exposure on AMF and UPF</li><li>Have been to customer escalation role</li><li>Spirent Landslide</li><li>Python, Shell Scripting, Robot framework</li></ul> Desired skills:<ul><li>Certification in Kubernetes, Exposure to Grafana and Prometheus is added advantage.</li><li>Experience in CI/CD tools Jenkins and GIT</li></ul> Preferred Qualifications:<ul><li>Experience: 6 to 10 years of relevant experience</li><li>Education: B.Tech/BE or any other equivalent degree, PG in communication field</li></ul>

Tejas Networks Ltd

BIM Engineer We are looking for talented and experienced professionals to be part of our MEP team.ELECTRICAL: Required Skills &amp; Experience:• Experience on international projects (Buildings) is preferred.• Proficiency in Autodesk Revit MEP and Navisworks is required.• Strong understanding of MEPF services coordination. • Experience - 10-12 years• Qualification: B.E. / B.Tech Electrical / Mechanical Share your updated resume now.

Neilsoft Ltd

Civil Design Engineer

RTL ENGINEER Experience: 4+ YearsThis job might be for you if<ul><li>You enjoy solving problems. You love taking on difficult challenges and finding creative solutions.</li><li>You don’t know the answer but will dig until you find it.</li><li>You communicate clearly. You write well.</li><li>You are motivated and driven. You volunteer for new challenges without waiting to be asked. You will take ownership of the time you spend with us and make a difference.</li><li>You can impress our customers with your enthusiasm to solve their issues (and solve them!)</li></ul> Job Description Required<ul><li>Solid RTL coding experience including</li><li>Microarchitecture of design</li><li>System Verilog and Verilog coding using provided coding styles.</li><li>Understanding of SDC</li><li>Understanding STA reports and how to adjust RTL accordingly.</li><li>Designing for error cases and debug of IP</li><li>Understanding of CDC logic</li><li>Knowledge of lint rules and exceptions</li><li>Design and use of block level simulations to bring up IP.</li><li>Knowledge of AMBA buses and when to use them.</li></ul> Job Description Preferred<ul><li>Experience&nbsp;leading small design team.</li><li>C coding / Firmware skills</li><li>Knowledge on common processor architectures&nbsp;(ARM, RiscV)</li><li>FPGA experience includes part selection, pin assignment, timing constraints, synthesis, and debug of design in the FPGA.</li><li>Lab brings up experience, scripting.</li><li>Relevant tool experience such as: Socrates, Core Consultant in addition&nbsp;to standard simulation tools (xcellium, vcs, etc)</li><li>Emulation experience&nbsp;(Zebu, Palladium, etc)</li><li>Board knowledge, component selection, probing, debug.</li><li>JTAG debugging experience (Coresight, Lauterbach, etc).</li><li>Low power design techniques</li></ul> Qualifications<ul><li>E./B.Tech. degree at minimum.</li></ul>

Eximietas Design

Junior Network Engineer

GE Proficy Solution Architect We are hiring resource for GE Proficy Solution Architect with below mentioned KRA:-Core Technical Skills :-1. MES Platforms &amp; ToolsDeep expertise in GE Proficy MES suite&nbsp;preferably the latest versions, including Workflow, Plant Applications, and Historian.2. Programming &amp; IntegrationIntegration of MES with ERP and downstream systems using low-code platforms and rapid application development methodologies.3. Cloud &amp; DevOpsGood to have familiarity with Azure DevOps, Data Lake architectures, and cloud-based SaaS solutions.Functional &amp; Domain Expertise4. Manufacturing Operations Management (MOM)Hands-on experience in Downtime, Production, Maintenance management etc.5. Industry-Specific KnowledgeProven delivery across Consumer Packaged Goods (CPG), Food Manufacturing, and Healthcare.6. Digital TransformationAbility to reimagine business processes using digital technologies—from concept to execution—aligned with evolving market needs.7. Solution Architecture LifecycleEnd-to-end ownership from Concept → Design → Plan → Execute → Learn phases of MES implementation. If interested, share your resume.

Capgemini Engineering

DevOps Architect

NVH Engineer (Nastran) We're hiring below position: Skills: NVH Engineer (Nastran)Experience: 4 to 6 yearsLocation: Chennai If interested, share your CV.

Senior Technical Engineer

Embedded Developer (Board Bring up) We're hiring below position: Position: Embedded Developer (Board Bring up)Experience: 4 to 8 yearsLocation: Bangalore If you're interested, please share your profile.

Capgemini

Embedded Software Developer

Emulation Engineer We are excited to announce an amazing opportunity to work with Emulation Engineer.Experience: 6 TO 12 years Responsibilities• Develop RTL models for IPs, subsystems, and SoCs using Verilog/SystemVerilog• Build emulation models from scratch and integrate Transactors/AVIPs• Work with emulation platforms (Cadence Palladium, ZeBu, Mentor Veloce) for model compilation, test execution, and debugging• Write and port sanity testcases (SCEMI/DPI) for emulation compatibility• Configure and manage emulation environments, servers, and clusters• Execute emulation-specific verification plans and debug runtime flows• Strong protocol knowledge: ARM cores, PCIe Gen4/5, JTAG, SPI, UART, I2C, USB2/3, HDMI, DisplayPort, Ethernet (1G–10G) Automation &amp; Scripting:• Proficient in Unix shell scripting, Python, Perl, Tcl• Automate emulation tasks, regression flows, and CI pipelines If you're a tech-savvy professional looking to make an impact, we’d love to hear from you!

Sr Firmware Engineer <a rel="noopener noreferrer" href="\&quot;https://www.linkedin.com/search/results/all/?keywords=%23capgeminiengineering&amp;origin=HASH_TAG_FROM_FEED\&quot;" target="_blank">Capgemini Engineering</a> is hiring Sr Firmware Engineer&nbsp;Experience: 6–9 years Educational Qualifications: BE/ ME/ MS/BTech/MTech Electrical, Electronics , Computer Science Job Description:<ul><li>C/C++ programming</li><li>Embedded system development, Firmware, Device drivers &amp; Board support packages.</li><li>Knowledge of processor architectures – 8bit, 16bit and 32bit, DSPs</li><li>Knowledge of Software development life cycle – SDLC</li><li>Knowledge of Operating System concepts</li><li>Hands on experience on RTOS(GHS Integrity/VxWorks/ FreeRTOS) / Bare Metal Scheduler</li><li>Understand Firmware Architecture , Scheduler / Task manager implementations</li><li>Understand and Implement design represented by&nbsp;Finite State Machine (FSM), State Transition Matrix (STM), STD</li><li>Worked on atleast one full SDLC project/program</li><li>Capability to read hardware designs &amp; schematic.</li><li>Exposure to using oscilloscope, multi-meter.</li><li>Exposure to Industrial&nbsp;/ Medical standards (ISO 13485. IEC 62304, IEC 601010, IEC 61508)</li></ul>

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