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<p>Senior Staff AI Engineer</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            Senior Staff AI Engineer
                                                                                    



                                                Job ID
                                            

                                                                                            9309
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Hyderabad
                                                                                    



                                                Date Posted
                                            

                                                                                            28-Jan-2025
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            AI
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<h4 id="isPasted"><strong>We Are:</strong></h4><p>  At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p><h4><br/></h4><h4><strong>You Are:</strong></h4><p>  You are an experienced AI engineer who thrives in fast-paced, cross-functional environments and is passionate about building scalable, robust, and intelligent systems. You have a deep understanding of large language models (LLMs), multi-agent orchestration, and workflow automation. You possess hands-on expertise in architecting and deploying production-ready AI solutions, leveraging both cutting-edge research and pragmatic engineering best practices. Your curiosity drives you to explore new technologies, and your resourcefulness enables you to solve complex problems with elegant, scalable solutions.</p><p>  You are comfortable working with modern cloud infrastructure, particularly on Azure, and have a keen awareness of FinOps principles to ensure efficient resource utilization. You are adept at integrating diverse data sources, designing retrieval-augmented generation (RAG) systems, and working with vector databases. Your programming skills in Python and experience with frameworks like Flask or FastAPI allow you to build high-availability, multi-agent architectures and scalable LLM applications. Collaboration is second nature to you, and you communicate effectively with technical and non-technical stakeholders alike. You are passionate about mentoring others, fostering a culture of innovation, and driving impactful outcomes for customers and the business.</p><h4><br/></h4><h4><strong>What You’ll Be Doing:</strong></h4><ul><li>Designing and implementing advanced AI workflows using large language models and multi-agent orchestration.</li><li>Building production-ready systems for workflow automation, leveraging orchestration tools such as n8n, Airflow, and Prefect.</li><li>Architecting and scaling AI solutions on Azure Cloud, with a strong emphasis on Azure OpenAI and cloud monitoring services.</li><li>Developing retrieval-augmented generation (RAG) pipelines and integrating vector databases like Pinecone, Weaviate, Milvus, and FAISS.</li><li>Programming and deploying high-availability services using Python, Flask, and FastAPI, ensuring robust system design and seamless integrations.</li><li>Collaborating closely with cross-functional teams to integrate ServiceNow, Teams bots, REST APIs, and cloud monitoring tools into end-to-end solutions.</li><li>Optimizing cloud spend and resource allocation by applying FinOps principles and developing cost optimization agents.</li><li>Mentoring junior engineers and driving best practices in system architecture, automation, and AI deployment.</li></ul><h4><br/></h4><h4><strong>The Impact You Will Have:</strong></h4><ul><li>Accelerate Synopsys’ leadership in AI-driven automation by delivering innovative, scalable agentic systems.</li><li>Enable customers to unlock new efficiencies in chip design, verification, and software development through intelligent workflow orchestration.</li><li>Drive operational excellence by optimizing cloud utilization and reducing infrastructure costs via intelligent monitoring and automation.</li><li>Advance the adoption of retrieval-augmented generation (RAG) solutions, enhancing data-driven decision-making across the organization.</li><li>Improve system reliability and self-healing capabilities through event-driven ambient agents.</li><li>Foster a culture of knowledge sharing and continuous improvement by mentoring team members and contributing to architectural best practices.</li></ul><h4><br/></h4><h4><strong>What You’ll Need:</strong></h4><ul><li>Expertise in large language models (LLMs) and multi-agent architectures.</li><li>Strong programming skills in Python, with experience in Flask and/or FastAPI.</li><li>Hands-on experience with workflow orchestrators (n8n, Airflow, Prefect) and event-driven agentic systems.</li><li>Advanced knowledge of Azure Cloud services, including Azure OpenAI, Azure Monitor, and Azure Cost APIs.</li><li>Proficiency in database technologies (Snowflake, Postgres, SQL Server) and vector databases (Pinecone, Weaviate, Milvus, FAISS).</li><li>Experience integrating enterprise systems (ServiceNow, Teams bots, REST APIs) and cloud monitoring tools.</li></ul><h4><br/></h4><h4><strong>Who You Are:</strong></h4><ul><li>Innovative thinker with a passion for solving complex problems.  </li><li>Collaborative team player who communicates effectively across diverse groups.</li><li>Proactive and resourceful, with a strong sense of ownership and accountability.</li><li>Flexible and adaptable, comfortable with ambiguity and change.</li><li>Committed to continuous learning and mentoring others.</li><li>Detail-oriented, with a focus on delivering high-quality, reliable solutions.</li></ul><h4><br/></h4><h4><strong>The Team You’ll Be A Part Of:</strong></h4><p>  You’ll join Synopsys’ AI/Agentic Systems team—a group of passionate engineers focused on building intelligent, scalable workflows for the next generation of silicon design and software automation. The team works at the intersection of AI research, cloud infrastructure, and enterprise integrations, driving innovation and operational excellence across Synopsys’ global business. Together, you will shape the future of automation and intelligence in high-tech engineering.</p><h4><br/></h4><h4><strong>Rewards and Benefits:</strong></h4><p>  We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p><p><br/></p><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

Synopsys India Pvt Ltd

Senior Automation Engineer

<p>Principal Engineer, Firmware Verification Engineering</p><h4>Company Description</h4><p>Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.</p><p>Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.</p><p>Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.</p><h4>Job Description</h4><p><strong>About the position</strong>:</p><p>As a Principal Engineer, you will be part of the Firmware Verification Team that design and develop white box and grey box tests in Python to verify firmware designs of Storage systems for AI workloads. You will be working closely with product architects and firmware engineers to create a comprehensive firmware verification test. In this role, you will be technically leading a high energy team, contributing to test strategy, test development, integrating the tests using various development platforms and perform failure analysis. This role demands strong hands-on experience with understanding of NAND architecture design, data path validation, handling of NAND level errors, and firmware/hardware debugging across multiple platforms (pre-silicon, emulation, silicon bring-up)</p><p><strong>Key Responsibilities</strong></p><ul><li>Collaborate closely with firmware engineers &amp; architects on product architecture and designs to define the comprehensive verification plan to deliver a high quality product to customers on time</li><li>Design, Develop and Integrate the white box and gray box tests on SSD products in roadmap inline with latest methodologies</li><li>Conduct test plan reviews and code reviews to ensure the tests are scalable and meeting the requirements</li><li>Participate in driving failure analysis and collaborate with integration/execution engineers for test deployment.</li><li>Work with memory (NAND ) systems team, to understand the implementation of algorithms handling IO paths, behavior of NAND when single bit or double bit level error occurs, correction mechanisms, etc</li><li>Work with firmware engineers, understand the logs/events to triage and debug test failures</li><li>Use SanDisk proprietary tools and open-source test frameworks to run, monitor, and triage test suites</li></ul><h4>Qualifications</h4><p><strong>Required Qualifications &amp; Skills:</strong></p><ul><li>BE/B.Tech/ME/M.Tech degree in in Electronics &amp; Electrical Engineering, Computer Engineering or related field</li><li>Strong understanding of NAND Flash architecture, NAND interface protocols, and error management.</li><li>Proficiency in scripting and automation using Python, C/C++, or Bash</li><li>Comprehensive understanding of embedded software fundamentals and Storage fundamentals with Knowledge on NVMe/PCIe specification</li><li>Experience in verifying the memory with NAND Emulated model</li><li>Experience with embedded systems, firmware-hardware debugging, and low-level protocol analysis.</li><li>Minimum 10+ years of experience in firmware development or validation in storage, semiconductor, or non-volatile memory development and technically leading a team of 3-5 members</li></ul><ul><li>Strong architectural review skills with the ability to provide guidance and review test development efforts and test coverage.</li><li>Test development using AI tools and hands on experience on GPU/NPU verification is an added advantage</li><li>SystemC modelling experience</li><li>Knowledge on Git, CI &amp; source code management flow and agile development practices.</li></ul><p><strong>Soft Skills:</strong></p><ul><li>Strong problem-solving skills focusing on status quo</li><li>Collaborative and proactive communication style</li><li>Attention to detail and quality assurance mindset</li><li>Ability to work effectively in a global, cross-functional team in high paced environment</li></ul><h4>Additional Information</h4><p>Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.</p><p>Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at <a href="mailto:jobs.accommodations@sandisk.com">jobs.accommodations@sandisk.com</a> to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.</p><h4>Experience Level</h4>Senior Level

SanDisk India Device Design Centre Pvt.Ltd

Embedded Software Developer

<p>Staff Engineer, Firmware Verification Engineering</p><h4>Company Description</h4><p>Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.</p><p>Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.</p><p>Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.</p><h4>Job Description</h4><p><strong>About the position</strong>:</p><p>As a Staff firmware verification engineer, you will be part of firmware verification team that design and develop white box and grey box tests in Python to verify SSD firmware designs for each firmware feature. This position is specifically to focus on verification and validation of SSD firmware features. You will be working closely with product architects and firmware engineers to create a comprehensive firmware verification test for SSD features. In this role, you will be contributing to test strategy, test development, integrating the tests using various development platforms, deploying it on firmware verification lab for regression runs and perform failure analysis.</p><p><strong>Responsibilities:</strong></p><ul><li>Collaborate closely with firmware engineers &amp; architects on product architecture and designs to define the comprehensive verification plan to validate each SSD features</li><li>Design, Develop and Integrate the white box and gray box tests on SSD products in roadmap</li><li>Conduct test plan reviews and code reviews to ensure the tests are scalable and meeting the requirements</li><li>Participate in driving failure analysis and collaborate with integration/execution engineers for test deployment.</li><li>Work with memory (NAND ) systems team, to understand the implementation of algorithms handling IO paths, behavior of NAND when single bit or double bit level error occurs, correction mechanisms, etc</li><li>Work with firmware engineers, understand the logs/events to triage and debug test failures</li></ul><h4>Qualifications</h4><p><strong>Required Qualifications &amp; Skills:</strong></p><ul><li>BE/B.Tech/ME/M.Tech degree in Computer Science or related field</li><li>Strong understanding of NAND Flash architecture, NAND interface protocols, and error management.</li><li>Proficiency in scripting and automation using Python, C/C++, or Bash.</li><li>Experience in verifying the memory with NAND Emulated model</li><li>Experience with embedded systems, firmware-hardware debugging, and low-level protocol analysis.</li><li>Minimum 6 – 8 years of related experience in storage, semiconductor, or non-volatile memory development</li></ul><ul><li>Strong architectural review skills with the ability to provide guidance and review test development efforts and test coverage.</li><li>Comprehensive understanding of embedded software fundamentals and Storage fundamentals with Knowledge on NVMe/PCIe specification</li><li>Test development using AI tools and hands on experience GPU/NPU verification is an added advantage</li><li>SystemC modelling experience</li><li>Knowledge on Git, CI &amp; source code management flow and agile development practices.</li></ul><p><strong>Soft Skills:</strong></p><ul><li>Strong problem-solving skills with a focus on root cause analysis.</li><li>Collaborative and proactive communication style.</li><li>Attention to detail and quality assurance mindset.</li><li>Ability to work effectively in a global, cross-functional team.</li></ul><h4>Additional Information</h4><p>Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.</p><p>Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at <a href="mailto:jobs.accommodations@sandisk.com">jobs.accommodations@sandisk.com</a> to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.</p><h4>Experience Level</h4>Senior Level

<p>Multimedia ASIC IP Hardware Architect, Silicon</p><h4>Minimum qualifications:</h4><ul><li>Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.</li><li>10 years of experience in ASIC hardware architecture and silicon design.</li></ul><br/><h4>Preferred qualifications:</h4><ul><li>Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.<br/></li><li>Experience with processor core architectures (such as ARM, x86, RISC-V, etc.) and IPs commonly used in SoC designs.<br/></li><li>Experience architecting and designing low power ASIC hardware IP for SoCs in the following areas: camera ISP, video codecs, display, graphics and machine learning networks.</li><li>Experience in architecting ambient or always-on vision hardware and workflows for ultra low power SoC applications.</li></ul><h4>About the job</h4>Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.<h4>Responsibilities</h4><ul><li>Define and deliver the hardware Multimedia/Graphics ASIC IP architecture that meet engaged power, performance, area and image quality goals, which will require owning the goals through to tape-out and product launch.</li><li>Collaborate with Graphics, Camera, Video, Display and ML software, system and algorithm engineers to co-develop and specify engaged hardware IP architectures for integration into SoCs.</li><li>Collaborate with GPU, TPU, camera ISP, video and display hardware IP design teams across global sites to drive the hardware IP architecture specifications into design implementation for SoCs.</li><li>Collaborate with SoC and System/Experience architects on meeting strenuous power, performance and area requirements at the SoC level for multimedia use cases and experiences.</li><li>Perform detailed data analysis and tradeoff evaluations to improve multimedia architecture solutions.</li></ul><h4>Experience Level</h4>Senior Level

Google India Pvt Ltd

Hardware & Network Engineer

<p>Silicon Design Verification Engineer III</p><h4>Minimum qualifications:</h4><ul><li>Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.</li><li>4 years of experience with SystemVerilog, Design Verification Test, Universal Verification Methodology.</li><li>3 years of experience working with test methodologies, creating test plans, and writing test cases.</li></ul><br/><h4>Preferred qualifications:</h4><ul><li>Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.</li><li>Experience in low-power design verification.</li></ul><h4>About the job</h4>Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. <br/><br/>As a part of the Google Silicon Platforms team, you will work on the verification of the backbone of Google’s SOC offerings. You will collaborate with hardware architects and design engineers for functional and performance verification of the infrastructure IP, interconnects, caches, memory management and system services. You will also work on developing high performance VIPs for protocols supported by our SOCs, and closely collaborate in the deployment of the verification stack across a heterogeneous set of IPs. You will include build and verify a generalized system topology abstractions, and develop the associated methodologies and tools needed to solve the problem.The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world.<h4>Responsibilities</h4><ul><li>Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.</li><li>Create and enhance constrained-random verification environments using System Verilog and UVM.</li><li>Identify and write all types of coverage measures for stimulus and corner-cases.</li><li>Debug tests with Design Engineers to deliver functionally correct design blocks.</li><li>Close coverage measures to identify verification holes and to show progress towards tape-out.</li></ul><h4>Experience Level</h4>Senior Level

Testing Engineer

<p>Applications Engineering, Sr Staff Engineer</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            Applications Engineering, Sr Staff Engineer
                                                                                    



                                                Job ID
                                            

                                                                                            11958
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Bangalore
                                                                                    



                                                Date Posted
                                            

                                                                                            03-Jul-2025
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            Applications Engineering
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<h4 id="isPasted"><b>Alternate Job Titles:</b><ul><li>Senior Staff AI Methodology Engineer</li><li>Principal EDA Solutions Engineer</li><li>AI-Driven RTL-to-GDS Flow Specialist</li><li>Lead Application Engineer – AI EDA Solutions</li></ul><h4><b>We Are:</b></h4><p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p><h4><b>You Are:</b></h4><p>You are an accomplished and forward-thinking engineering professional with a deep passion for the intersection of artificial intelligence and semiconductor design. Your expertise spans RTL-to-GDSII flows, and you have hands-on experience with industry-leading EDA tools, especially those driving the next generation of AI and high-performance compute silicon. You are highly analytical, able to dissect complex design challenges and architect robust, scalable solutions that address both immediate and future technology needs. You thrive in customer-facing roles, translating requirements into actionable methodologies and championing innovation every step of the way.</p><p>Your leadership skills are proven—whether guiding junior engineers, collaborating with global customers, or interfacing with R&amp;D to influence product direction. You communicate complex concepts with clarity, and your presentations inspire confidence and trust. Adaptable and resourceful, you excel at managing multiple priorities in dynamic, fast-paced environments. You have a track record of technical excellence, a commitment to continuous learning, and a genuine enthusiasm for empowering others. If you are driven by solving tomorrow’s silicon challenges and have a curiosity to explore new AI-driven design paradigms, you will find your next career milestone here at Synopsys.</p><h4><b>What You’ll Be Doing:</b></h4><ul><li>Partnering with leading customers to develop and implement advanced AI-driven RTL-to-GDS methodologies using Synopsys EDA tools, IPs, and libraries.</li><li>Creating and optimizing design flows and solutions to meet aggressive PPA (performance, power, area) targets for high-frequency cores, automotive, and high-capacity AI/compute designs.</li><li>Enabling and deploying flows/solutions leveraging Synopsys offerings such as Fusion Compiler, RTL Architect, and AI-based Design Space Optimization engines, utilizing Tcl/Python scripting for automation.</li><li>Collaborating cross-functionally with customers, R&amp;D, and internal teams to drive innovative solution and feature development that anticipates and addresses real-world design challenges.</li><li>Leading and mentoring a team of junior application engineers, providing technical guidance, coaching, and project management support to ensure successful execution of deliverables.</li><li>Delivering technical presentations, application notes, and best practices to both internal and external stakeholders, supporting knowledge-sharing and customer enablement.</li></ul><h4><b>The Impact You Will Have:</b></h4><ul><li>Accelerate customer adoption of next-generation AI-driven design methodologies, empowering them to achieve breakthrough silicon results.</li><li>Shape Synopsys’ technology direction by providing valuable field insights and partnering with R&amp;D on new feature development.</li><li>Reduce time-to-market and improve competitiveness for customers through innovative flow optimization and automation.</li><li>Drive Synopsys’ leadership in AI-powered EDA solutions, further differentiating our offerings in a competitive market.</li><li>Elevate the technical capabilities of the application engineering team through mentorship and cross-training.</li><li>Enhance customer satisfaction and loyalty through proactive engagement, expert troubleshooting, and tailored technical support.</li></ul><h4><b>What You’ll Need:</b></h4><ul><li>Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field with10+ years of relevant experience.</li><li>Deep understanding of RTL-to-GDSII flows and hands-on experience with backend P&amp;R tools (Fusion Compiler, ICC2, or similar).</li><li>Expertise in physical synthesis, timing closure, clock tree synthesis (CTS), and routing at advanced technology nodes.</li><li>Proficiency in Tcl and Python scripting for automating EDA workflows and optimizing design methodologies.</li><li>Strong technical account management skills and a proven ability to lead and mentor teams in a high-performance environment.</li><li>Outstanding verbal and written communication, presentation, and customer interaction skills.</li></ul><h4><b>Who You Are:</b></h4><ul><li>Collaborative and empathetic leader, skilled at building relationships and enabling the success of others.</li><li>Analytical thinker with a problem-solving mindset and a passion for continuous improvement.</li><li>Adaptable and resilient in the face of evolving customer requirements and technology landscapes.</li><li>Strong organizational skills, able to manage multiple projects and priorities with poise.</li><li>Driven by curiosity and a desire to innovate at the forefront of AI and semiconductor design.</li></ul><h4><b>The Team You’ll Be A Part Of:</b></h4><p>You’ll join a dynamic and diverse Application Engineering team at Synopsys Bangalore, dedicated to driving customer success and innovation in AI-enabled design automation. The team partners closely with global customers, R&amp;D, and product management to deliver state-of-the-art solutions for the most advanced silicon on the planet. With a culture rooted in collaboration, technical excellence, and mentorship, you’ll have the opportunity to lead, learn, and contribute to the next wave of EDA innovation.</p><h4><b>Rewards and Benefits:</b></h4><p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p></h4><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

Application Engineer

<p>Applications Engineering, Sr Staff Engineer</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            Applications Engineering, Sr Staff Engineer
                                                                                    



                                                Job ID
                                            

                                                                                            11956
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Bangalore
                                                                                    



                                                Date Posted
                                            

                                                                                            03-Jul-2025
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            Applications Engineering
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<h4 id="isPasted"><b>Alternate Job Titles:</b><ul><li>Senior Staff AI Methodology Engineer</li><li>Principal EDA Solutions Engineer</li><li>AI-Driven RTL-to-GDS Flow Specialist</li><li>Lead Application Engineer – AI EDA Solutions</li></ul><h4><b>We Are:</b></h4><p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p><h4><b>You Are:</b></h4><p>You are an accomplished and forward-thinking engineering professional with a deep passion for the intersection of artificial intelligence and semiconductor design. Your expertise spans RTL-to-GDSII flows, and you have hands-on experience with industry-leading EDA tools, especially those driving the next generation of AI and high-performance compute silicon. You are highly analytical, able to dissect complex design challenges and architect robust, scalable solutions that address both immediate and future technology needs. You thrive in customer-facing roles, translating requirements into actionable methodologies and championing innovation every step of the way.</p><p>Your leadership skills are proven—whether guiding junior engineers, collaborating with global customers, or interfacing with R&amp;D to influence product direction. You communicate complex concepts with clarity, and your presentations inspire confidence and trust. Adaptable and resourceful, you excel at managing multiple priorities in dynamic, fast-paced environments. You have a track record of technical excellence, a commitment to continuous learning, and a genuine enthusiasm for empowering others. If you are driven by solving tomorrow’s silicon challenges and have a curiosity to explore new AI-driven design paradigms, you will find your next career milestone here at Synopsys.</p><h4><b>What You’ll Be Doing:</b></h4><ul><li>Partnering with leading customers to develop and implement advanced AI-driven RTL-to-GDS methodologies using Synopsys EDA tools, IPs, and libraries.</li><li>Creating and optimizing design flows and solutions to meet aggressive PPA (performance, power, area) targets for high-frequency cores, automotive, and high-capacity AI/compute designs.</li><li>Enabling and deploying flows/solutions leveraging Synopsys offerings such as Fusion Compiler, RTL Architect, and AI-based Design Space Optimization engines, utilizing Tcl/Python scripting for automation.</li><li>Collaborating cross-functionally with customers, R&amp;D, and internal teams to drive innovative solution and feature development that anticipates and addresses real-world design challenges.</li><li>Leading and mentoring a team of junior application engineers, providing technical guidance, coaching, and project management support to ensure successful execution of deliverables.</li><li>Delivering technical presentations, application notes, and best practices to both internal and external stakeholders, supporting knowledge-sharing and customer enablement.</li></ul><h4><b>The Impact You Will Have:</b></h4><ul><li>Accelerate customer adoption of next-generation AI-driven design methodologies, empowering them to achieve breakthrough silicon results.</li><li>Shape Synopsys’ technology direction by providing valuable field insights and partnering with R&amp;D on new feature development.</li><li>Reduce time-to-market and improve competitiveness for customers through innovative flow optimization and automation.</li><li>Drive Synopsys’ leadership in AI-powered EDA solutions, further differentiating our offerings in a competitive market.</li><li>Elevate the technical capabilities of the application engineering team through mentorship and cross-training.</li><li>Enhance customer satisfaction and loyalty through proactive engagement, expert troubleshooting, and tailored technical support.</li></ul><h4><b>What You’ll Need:</b></h4><ul><li>Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field with10+ years of relevant experience.</li><li>Deep understanding of RTL-to-GDSII flows and hands-on experience with backend P&amp;R tools (Fusion Compiler, ICC2, or similar).</li><li>Expertise in physical synthesis, timing closure, clock tree synthesis (CTS), and routing at advanced technology nodes.</li><li>Proficiency in Tcl and Python scripting for automating EDA workflows and optimizing design methodologies.</li><li>Strong technical account management skills and a proven ability to lead and mentor teams in a high-performance environment.</li><li>Outstanding verbal and written communication, presentation, and customer interaction skills.</li></ul><h4><b>Who You Are:</b></h4><ul><li>Collaborative and empathetic leader, skilled at building relationships and enabling the success of others.</li><li>Analytical thinker with a problem-solving mindset and a passion for continuous improvement.</li><li>Adaptable and resilient in the face of evolving customer requirements and technology landscapes.</li><li>Strong organizational skills, able to manage multiple projects and priorities with poise.</li><li>Driven by curiosity and a desire to innovate at the forefront of AI and semiconductor design.</li></ul><h4><b>The Team You’ll Be A Part Of:</b></h4><p>You’ll join a dynamic and diverse Application Engineering team at Synopsys Bangalore, dedicated to driving customer success and innovation in AI-enabled design automation. The team partners closely with global customers, R&amp;D, and product management to deliver state-of-the-art solutions for the most advanced silicon on the planet. With a culture rooted in collaboration, technical excellence, and mentorship, you’ll have the opportunity to lead, learn, and contribute to the next wave of EDA innovation.</p><h4><b>Rewards and Benefits:</b></h4><p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p></h4><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

Senior Application Engineer

<p>Applications Engineering, Staff Engineer</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            Applications Engineering, Staff Engineer
                                                                                    



                                                Job ID
                                            

                                                                                            12365
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Bengaluru
                                                                                    



                                                Date Posted
                                            

                                                                                            23-Jul-2025
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            Applications Engineering
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<p id="isPasted"><strong><span>Job Description and Requirements</span></strong></p><p><span>At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.</span></p><p><span> </span></p><p><span>Our Silicon Design &amp; Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.</span></p><p><span> </span></p><p><span>We're looking for an Applications Engineer to join our team. Does this sound like a good role for you?</span></p><p><span> </span></p><p><span>This is an exciting opportunity to be part of applications engineering team that supports the industry leading Static Timing Analysis tool, Primetime. The primary focus of the Application Engineer (AE) is to drive increased usage of the product in both pre-sale and post-sale capacity. Pre-sales tasks include competitive benchmarks and evaluation, articulating the superiority to our customer’s design team and management. Post-sales tasks include customer training, tape-out support and advance collaboration initiatives for product enhancements. The job involves working closely with users/customers and multiple organizations like R&amp;D, marketing, sales among others.</span></p><p><span> </span></p><p><strong><span>Key Qualifications</span></strong></p><ul type="disc"><li><span>Synopsys STA tool, Primetime experience and knowledge are required</span></li><li><span>Knowledge of timing corners/modes, process variations and signal integrity related issues are required</span></li><li><span>Familiarity with synthesis, Physical design, extraction and ECO methodology is desired</span></li><li><span>Strong TCL knowledge is preferred</span></li><li><span>Excellent verbal and written communication skills are mandatory. Prior customer facing role is a plus</span></li><li><span>BSEE or equivalent, required with 3-4 years of experience, or MSEE, or equivalent with 2-3 years of experience</span></li></ul><p id="isPasted"><strong><span>Job Description and Requirements</span></strong></p><p><span>At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.</span></p><p><span> </span></p><p><span>Our Silicon Design &amp; Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.</span></p><p><span> </span></p><p><span>We're looking for an Applications Engineer to join our team. Does this sound like a good role for you?</span></p><p><span> </span></p><p><span>This is an exciting opportunity to be part of applications engineering team that supports the industry leading Static Timing Analysis tool, Primetime. The primary focus of the Application Engineer (AE) is to drive increased usage of the product in both pre-sale and post-sale capacity. Pre-sales tasks include competitive benchmarks and evaluation, articulating the superiority to our customer’s design team and management. Post-sales tasks include customer training, tape-out support and advance collaboration initiatives for product enhancements. The job involves working closely with users/customers and multiple organizations like R&amp;D, marketing, sales among others.</span></p><p><span> </span></p><p><strong><span>Key Qualifications</span></strong></p><ul type="disc"><li><span>Synopsys STA tool, PrimeTime experience and knowledge are required</span></li><li><span>Knowledge of timing corners/modes, process variations and signal integrity related issues are required</span></li><li><span>Familiarity with synthesis, Physical design, extraction and ECO methodology is desired</span></li><li><span>Strong TCL knowledge is preferred</span></li><li><span>Excellent verbal and written communication skills are mandatory. Prior customer facing role is a plus</span></li><li><span>BSEE or equivalent, required with 3-4 years of experience, or MSEE, or equivalent with 2-3 years of experience</span></li></ul><p><br/></p><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

<p>ASIC Digital Design, Sr Staff Engineer</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            ASIC Digital Design, Sr Staff Engineer
                                                                                    



                                                Job ID
                                            

                                                                                            12397
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Bangalore
                                                                                    



                                                Date Posted
                                            

                                                                                            29-Jul-2025
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            ASIC Digital Design
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<h4 id="isPasted"><strong>Alternate Job Titles:</strong></h4><ul><li>Senior RTL Design Lead</li></ul><h4><br/></h4><h4><strong>We Are:</strong></h4><p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p><h4><strong>You Are:</strong></h4><p>You are a passionate and accomplished RTL design expert with a proven track record in leading complex ASIC digital subsystems from concept to silicon. Thriving on technical challenges, you find deep satisfaction in delivering first-time-right RTL and architecting robust, scalable subsystems. Your experience spans multiple successful tape-outs, and you have earned a reputation for technical excellence, reliability, and mentorship within cross-functional teams. <br/><br/>You are energized by collaborating with diverse groups—design, verification, DFT, and implementation—to bring ambitious projects to fruition. You are meticulous in your approach, always striving for the highest quality standards, and have a strong grasp of industry-standard protocols such as PCIe, DDR, UFS, USB, and AMBA. Your expertise extends to low power design techniques and DFT architectures, and you are adept at translating requirements into elegant micro-architectures and functional specifications.<br/><br/>As a leader, you inspire and guide your peers, leveraging your 8+ years of experience to drive innovation, efficiency, and reliability. You are committed to continuous learning, open to new perspectives, and value an inclusive workplace where ideas from all backgrounds contribute to groundbreaking solutions. If you are eager to shape the next generation of digital IP subsystems and make a lasting impact in the semiconductor industry, we want to hear from you.</p><h4><br/></h4><h4><strong>What You’ll Be Doing:</strong></h4><ul><li>Leading the complete subsystem lifecycle—from requirements gathering and architecture definition to final release phases.</li><li>Crafting subsystem architectures and developing comprehensive functional specifications.</li><li>Defining and implementing micro-architectures, ensuring compliance with best RTL coding practices.</li><li>Driving RTL quality checks, linting, CDC, and ensuring bug-free first silicon delivery.</li><li>Collaborating closely with verification, DFT, and physical implementation teams to ensure seamless project execution.</li><li>Integrating and supporting standard protocols such as PCIe, DDR, UFS, USB, and AMBA within subsystem designs.</li><li>Applying low power design methodologies and ensuring DFT requirements are met at the architectural level.</li><li>Mentoring junior engineers and participating in technical reviews to foster innovation and knowledge sharing.</li></ul><h4><strong>The Impact You Will Have:</strong></h4><ul><li>Enable the delivery of state-of-the-art digital IP subsystems that power next-generation silicon solutions.</li><li>Drive first-time-right RTL, reducing verification cycles and accelerating time-to-market for Synopsys products.</li><li>Ensure robust integration of industry-standard protocols, bolstering product interoperability and performance.</li><li>Elevate subsystem quality and reliability through rigorous design and quality assurance practices.</li><li>Foster a collaborative and innovative team culture, mentoring and inspiring colleagues to achieve their best.</li><li>Contribute to Synopsys’ leadership in the semiconductor industry by delivering high-impact, scalable IP solutions.</li><li>Shape architectural decisions that influence the future direction of digital IP design at Synopsys.</li></ul><h4><strong>What You’ll Need:</strong></h4><ul><li>Minimum 8 years of hands-on experience in RTL design and subsystem architecture for complex ASIC/SoC projects.</li><li>Proficiency with standard protocols including PCIe, DDR, UFS, USB, and AMBA.</li><li>Demonstrated expertise in low power design methodologies and DFT architecture.</li><li>Strong experience with RTL coding (Verilog/SystemVerilog), linting, CDC, and formal verification tools.</li><li>Proven ability to lead cross-functional teams through all project phases, from specification to silicon.  </li><li>Solid understanding of the ASIC design flow, including synthesis, timing analysis, and physical implementation.</li></ul><h4><br/></h4><h4><strong>Who You Are:</strong></h4><ul><li>Innovative thinker with a growth mindset, always seeking to learn and improve.</li><li>Exceptional communicator—able to clearly articulate ideas, issues, and solutions across diverse teams.</li><li>Collaborative leader who thrives in a multicultural, inclusive environment.</li><li>Detail-oriented, with a passion for quality and excellence in every deliverable.</li><li>Adaptable and resilient when facing complex challenges and tight deadlines.</li><li>Mentor and role model for junior team members, fostering a culture of continuous improvement.</li></ul><h4><br/></h4><h4><strong>The Team You’ll Be A Part Of:</strong></h4><p>You will join the Synopsys Digital IP Subsystem team, a dynamic group of engineers dedicated to pushing the boundaries of integrated circuit design. Our team is at the forefront of innovation, delivering high-performance, reliable, and scalable digital subsystems for global customers. We value diversity, collaboration, and technical excellence, working together to solve complex challenges and enable Synopsys’ leadership in the semiconductor industry.</p><h4><strong>Rewards and Benefits:</strong></h4><p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

Embedded Systems Engineer

<p>ASIC Digital Design, Staff Engineer</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            ASIC Digital Design, Staff Engineer
                                                                                    



                                                Job ID
                                            

                                                                                            12389
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Hyderabad
                                                                                    



                                                Date Posted
                                            

                                                                                            28-Jul-2025
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            ASIC Digital Design
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<h4 id="isPasted"><strong>Alternate Job Titles:</strong></h4><ul><li>ASIC Digital Design, Staff Engineer</li></ul><h4><br/></h4><h4><strong>We Are:</strong></h4><p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p><h4><strong>You Are:</strong></h4><p>You are a passionate and experienced digital design engineer with a deep-rooted curiosity for advancing technology. With a strong foundation in RTL coding, microarchitecture, and high-speed digital IP, you thrive on tackling complex engineering challenges and delivering robust, scalable solutions. You are comfortable navigating the nuances of cutting-edge SERDES IP development and enjoy collaborating with cross-functional teams to deliver industry-leading results. Your proactive nature keeps you ahead of the curve, and your keen problem-solving abilities allow you to identify and resolve issues swiftly. You communicate effectively, ensuring your ideas are heard and understood, and you take pride in mentoring peers and contributing to a culture of continuous learning. You value diversity, demonstrate adaptability in a fast-paced environment, and bring both creativity and discipline to your work. Your technical acumen is matched by your drive to innovate, automate, and optimize design flows, making you an invaluable asset to any team focused on delivering world-class silicon solutions.</p><h4><br/></h4><h4><strong>What You’ll Be Doing:</strong></h4><ul><li>Analyzing and understanding complex IP specifications, clock architectures, and interface requirements for high-speed SERDES IP.</li><li>Designing, implementing, and optimizing Verilog RTL code to meet stringent performance, area, and power goals.</li><li>Debugging and verifying advanced digital features to ensure functional correctness and compliance with industry standards </li><li>Developing and automating design flows and scripts using Perl, Tcl, or Python to enhance productivity and streamline processes.</li><li>Collaborating with cross-functional teams, including analog, verification, and validation groups, to resolve technical challenges creatively.</li><li>Participating in design reviews, providing technical leadership, and contributing to best practice methodologies for digital IP development.</li><li>Staying current with industry trends and integrating innovative techniques into the design and verification process.</li></ul><h4><br/></h4><h4><strong>The Impact You Will Have:</strong></h4><ul><li>Enable the delivery of next-generation high-speed SERDES IP that powers a diverse range of customer products.</li><li>Drive innovation in digital design methodologies, boosting design efficiency and product quality.</li><li>Ensure Synopsys DesignWare IP remains at the forefront of performance, reliability, and feature support in the global market.</li><li>Facilitate seamless integration of IP into customer SoC designs, accelerating time-to-market for industry leaders.</li><li>Mentor and uplift the technical capabilities of team members, fostering a culture of collaboration and excellence.</li><li>Contribute to Synopsys' reputation as a trusted partner for silicon-proven, high-performance IP solutions.</li><li>Support continuous improvement by identifying and implementing process and technology enhancements.</li></ul><h4><br/></h4><h4><strong>What You’ll Need:</strong></h4><ul><li>Bachelor’s or Master’s degree in Electronics, Electrical Engineering, Computer Engineering, or a related field.</li><li>6 to 10 years of hands-on experience in high-speed digital IP design, particularly for SERDES or similar interfaces.</li><li>Expertise in microarchitecture, RTL coding (Verilog), and debugging complex digital designs.</li><li>Proficiency with industry-standard EDA tools and design flows for digital implementation and verification.</li><li>Strong scripting skills in Tcl, Perl, or Python for flow automation and process enhancement.</li><li>In-depth understanding of timing analysis, clock domain crossing, and interface protocols.</li></ul><h4><br/></h4><h4><strong>Who You Are:</strong></h4><ul><li>Analytical thinker with excellent problem-solving and debugging skills.</li><li>Proactive, self-motivated, and eager to take initiative in challenging situations.</li><li>Exceptional communicator who thrives in a collaborative, cross-functional team environment.</li><li>Committed to continuous learning, embracing new tools, techniques, and industry trends.</li><li>Adaptable, resilient, and able to manage multiple priorities in a fast-paced setting.</li><li>Values diversity, inclusion, and a culture of mutual respect.</li></ul><h4><br/></h4><h4><strong>The Team You’ll Be A Part Of:</strong></h4><p>You will join a world-class team of digital and mixed-signal engineers focused on developing high-speed SERDES IP, a cornerstone of the Synopsys DesignWare portfolio. Our team values innovation, collaboration, and technical excellence. We work closely with specialists across analog, verification, validation, and customer support to deliver robust, scalable IP solutions that meet the highest standards of quality and performance. You’ll have the opportunity to collaborate with experts in the field, contribute to groundbreaking projects, and help shape the future of silicon technology.</p><h4><strong>Rewards and Benefits:</strong></h4><p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

<p>ASIC Digital Design, Staff Engineer</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            ASIC Digital Design, Staff Engineer
                                                                                    



                                                Job ID
                                            

                                                                                            10865
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Bengaluru
                                                                                    



                                                Date Posted
                                            

                                                                                            24-Apr-2025
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            ASIC Digital Design
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<h4 id="isPasted"><b>Job Title:</b><ul><li>IP Design Technical Lead/ Staff ASIC RTL Design Engineer</li></ul><h4><b>We Are:</b></h4><p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p><h4><b>You Are:</b></h4><p>You are a passionate and forward-thinking digital design expert with a strong foundation in ASIC RTL design and a proven track record of delivering complex, high-performance IP cores. With a Bachelor’s or Master’s degree in EE, EC, or VLSI and over four years of relevant industry experience, you thrive in dynamic, multi-site environments and excel at translating functional specifications into robust, scalable architectures. You’re adept at working with advanced protocols such as Ethernet, DDR, PCIe, and USB, and have hands-on experience in data path and control path design, including Reed Solomon FEC, BCH codes, and MAC SEC engines.</p><p>Your expertise extends to synthesizable Verilog/SystemVerilog coding, timing closure, CDC analysis, and P&amp;R-aware synthesis, complemented by a keen understanding of design trade-offs in area, latency, and throughput. You are comfortable leveraging version control systems like Perforce and scripting languages such as Perl or Shell to automate and streamline workflows. As a natural leader, you are ready to mentor and technically guide a team of designers, fostering a collaborative and inclusive culture. Communication comes easily to you, and you’re known for your proactive problem-solving skills, attention to detail, and unwavering commitment to design quality. You’re seeking an opportunity to take ownership of challenging projects, contribute to cutting-edge innovation, and grow alongside a team of world-class engineering professionals.</p><h4><b>What You’ll Be Doing:</b></h4><ul><li>Architecting and implementing state-of-the-art RTL designs for the DesignWare IP family, targeting commercial, enterprise, and automotive applications.</li><li>Translating standard and functional specifications into detailed micro-architectures and comprehensive design documentation for medium to high complexity features.</li><li>Leading and contributing hands-on to RTL coding, synthesis, CDC analysis, debug, and test development tasks.</li><li>Collaborating with global teams and engaging directly with customers to understand and refine specification requirements.</li><li>Driving technical excellence in design processes, including linting, static timing analysis, formal checking, and P&amp;R-aware synthesis using tools such as Fusion Compiler.</li><li>Mentoring and technically leading a team of designers, providing guidance on best practices and innovative design methodologies.</li><li>Utilizing version control systems and scripting to manage design flows and automate repetitive tasks for improved efficiency.</li></ul><h4><b>The Impact You Will Have:</b></h4><ul><li>Enable Synopsys to deliver industry-leading, high-performance IP cores that power next-generation technologies.</li><li>Contribute to the successful execution of complex, global projects that set new standards in chip design and verification.</li><li>Accelerate time-to-market for customers in commercial, enterprise, and automotive sectors by delivering robust, reliable IP solutions.</li><li>Elevate the technical capabilities of your team through mentorship and leadership, cultivating a culture of continuous learning and innovation.</li><li>Drive improvements in design quality, efficiency, and scalability through process optimization and automation.</li><li>Directly influence product architecture and feature enhancements, ensuring alignment with customer needs and emerging industry trends.</li></ul><h4><b>What You’ll Need:</b></h4><ul><li>Bachelor’s or Master’s degree in Electrical Engineering, Electronics, VLSI, or related field.</li><li>4+ years of hands-on industry experience in ASIC RTL design, with a strong portfolio of completed projects.</li><li>Deep expertise in data path and control path design, including experience with Reed Solomon FEC, BCH codes, CRC architectures, and MAC SEC engines.</li><li>Proficiency in synthesizable Verilog/SystemVerilog, simulation tools, and design flows including lint, CDC, synthesis, and static timing analysis.</li><li>Familiarity with high-speed design (&gt;600MHz), P&amp;R-aware synthesis, and EDA tools such as Fusion Compiler.</li><li>Experience with version control systems (e.g., Perforce) and scripting languages (Perl, Shell) for design automation.</li><li>Knowledge of industry protocols: Ethernet, DDR, PCIe, USB, MIPI-UFS/Unipro, SD-MMC, AMBA (AMBA2, AXI).</li><li>Exposure to quality processes in IP design and verification is an advantage.</li><li>Prior experience as a technical lead or mentor is highly desirable.</li></ul><h4><b>Who You Are:</b></h4><ul><li>Innovative thinker with a solutions-oriented mindset and a passion for technology.</li><li>Excellent communicator who thrives in collaborative, multicultural, and multi-site environments.</li><li>Natural leader with mentoring abilities, fostering inclusion and diversity within the team.</li><li>Detail-oriented professional with strong analytical and problem-solving skills.</li><li>Self-motivated, adaptable, and eager to drive technical excellence and process improvements.</li><li>Committed to continuous learning and staying ahead of industry trends.</li></ul><h4><b>The Team You’ll Be A Part Of:</b></h4><p>You will join the R&amp;D Solutions Group at our Bangalore Design Center, as part of the DesignWare IP Design team. This diverse and innovative group is dedicated to architecting, developing, and delivering cutting-edge IP cores that enable Synopsys’ global customers to achieve their design goals. The team thrives on collaboration, technical excellence, and shared success, working in a supportive environment that values creativity, knowledge sharing, and continuous growth.</p><h4><b>Rewards and Benefits:</b></h4><p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p></h4><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

<p>ASIC Digital Verification, Sr. Staff Engineer- Pune</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            ASIC Digital Verification, Sr. Staff Engineer- Pune
                                                                                    



                                                Job ID
                                            

                                                                                            7025
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Pune
                                                                                    



                                                Date Posted
                                            

                                                                                            16-Oct-2024
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            ASIC Digital Design
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<h4 id="isPasted">Job Titles:<ul><li>Senior Staff ASIC Verification Engineer- Pune Location</li></ul><h4><b>We Are:</b></h4><p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p><h4><b>You Are:</b></h4><p>You are an experienced and passionate ASIC Digital Verification engineer, ready to take on technical leadership in a dynamic, high-impact environment. With a proven track record of developing and validating complex UVM verification environments, you thrive in collaborative settings and enjoy mentoring others. You bring a deep understanding of digital verification flows, simulation, and coverage analysis, and you excel at identifying and solving challenging design problems.</p><p>Your experience spans 8-15+ years in ASIC verification, where you've consistently demonstrated your ability to architect, plan, and execute verification strategies. You’re comfortable multitasking between multiple projects and have a genuine desire to stay at the forefront of emerging technologies. You communicate effectively in both written and spoken English, and your organizational skills help ensure that projects are delivered on time and to the highest quality standards. You’re motivated by the opportunity to make a significant impact, not just through your own work, but by elevating the entire team around you. Your proactive approach to learning, problem-solving, and process improvement defines your professional ethos.</p><h4><b>What You’ll Be Doing:</b></h4><ul><li>Identify verification environment requirements from specifications, design functionalities, and interfaces.</li><li>Generate comprehensive verification test plans and maintain detailed documentation for verification environments and their usage.</li><li>Define, develop, and verify advanced UVM (Universal Verification Methodology) environments for complex ASIC designs.</li><li>Evaluate and exercise all aspects of the verification flow, including Verilog/SystemVerilog development, functional simulation, constraint development, behavioral modeling, and coverage metrics analysis (functional and code coverage).</li><li>Collaborate closely with architects, designers, and the VIP team to ensure seamless integration and accomplishment of project goals.</li><li>Identify design problems, propose corrective actions, and resolve inconsistencies in documented functionalities.</li><li>Mentor and guide junior engineers, supporting them in debugging and solving complex verification problems.</li><li>Support customer issues through issue reproduction and in-depth analysis, ensuring customer satisfaction.</li><li>Drive continuous improvement of verification methodologies and execution efficiency within the team.</li><li>Adhere to best practices, quality standards, and maintain a high level of test and verification rigor.</li></ul><h4><b>The Impact You Will Have:</b></h4><ul><li>Accelerate the delivery of robust, high-quality ASIC products by ensuring thorough and systematic verification.</li><li>Enhance the team’s technical capabilities by sharing expertise and mentoring junior engineers.</li><li>Directly contribute to Synopsys’ reputation for excellence in silicon design and verification solutions.</li><li>Drive innovation in verification methodologies, raising the bar for future projects and industry standards.</li><li>Improve customer satisfaction by providing expert support and resolving technical challenges efficiently.</li><li>Facilitate cross-functional collaboration, fostering a culture of knowledge sharing and continuous learning.</li></ul><h4><b>What You’ll Need:</b></h4><ul><li>8-15+ years of hands-on experience in ASIC digital verification, preferably in a lead or staff engineering capacity.</li><li>Proficiency in Verilog, VHDL, and/or SystemVerilog languages, with a strong grasp of modern verification methodologies such as UVM.</li><li>Experience in developing and debugging verification environments, including test planning, simulation, and coverage analysis.</li><li>Familiarity with industry-standard scripting languages (BASH, TCSH, PERL, PYTHON, TCL) for automation and workflow optimization.</li><li>Excellent written and spoken English communication skills, with the ability to document and present technical concepts clearly.</li><li>Strong organizational skills, with experience managing multiple priorities and delivering high-quality results under tight deadlines.</li></ul><h4><b>Who You Are:</b></h4><ul><li>Innovative and proactive, with a passion for continuous learning and embracing new technologies.</li><li>Collaborative team player who thrives in a diverse, multicultural environment.</li><li>Analytical thinker with exceptional problem-solving and troubleshooting abilities.</li><li>Effective mentor and leader, capable of guiding and inspiring junior engineers.</li><li>Detail-oriented and process-driven, committed to delivering excellence in every project.</li><li>Resilient and adaptable, able to multitask and manage shifting priorities in a fast-paced setting.</li></ul><h4><b>The Team You’ll Be A Part Of:</b></h4><p>You will join a world-class team of verification engineers dedicated to delivering high-performance, reliable ASIC solutions. Our team values technical excellence, innovation, and collaboration. We work closely with architects, designers, and validation teams to ensure robust product delivery. As a senior member of the team, you will have the opportunity to influence verification strategies, lead technical initiatives, and mentor the next generation of engineering talent at Synopsys.</p><h4><b>Rewards and Benefits:</b></h4><p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p></h4><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

Test Engineer

<p>ASIC Physical Design, Sr Staff Engineer</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            ASIC Physical Design, Sr Staff Engineer
                                                                                    



                                                Job ID
                                            

                                                                                            12537
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Bengaluru
                                                                                    



                                                Date Posted
                                            

                                                                                            12-Aug-2025
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            ASIC Physical Design
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<h4 id="isPasted"><b>We Are:</b><p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p><h4><b>You Are:</b></h4><p>You are a passionate engineer who thrives in a collaborative and challenging environment. You have a strong desire to learn and explore emerging technologies, staying ahead in the rapidly evolving semiconductor landscape. Your analytical mindset and problem-solving skills enable you to tackle complex technical challenges creatively and independently. You possess deep expertise in ASIC physical design, particularly in implementing and optimizing high-speed DDR/HBM/UCIe/Die-to-Die IP at advanced technology nodes. You take pride in building efficient, high-performance silicon solutions and have experience with timing closure at frequencies above 2GHz, mixed signal integration, and clock tree synthesis with tight skew balancing. You are hands-on, detail-oriented, and able to technically lead and mentor a team of junior engineers, driving projects to successful completion with top quality and on schedule. Your effective communication skills allow you to work seamlessly with both local and global teams, including US counterparts, and you frequently engage with senior personnel across the organization. You are committed to continuous improvement and knowledge sharing, contributing to the growth of both your team and Synopsys as a whole. With at least 9 years of relevant experience, you excel at resolving issues, exercising independent judgment, and representing your team in company-wide initiatives. Your leadership inspires others, and you are always ready to guide peers and foster a culture of excellence and inclusion.</p><h4><br/></h4><h4><b>What You’ll Be Doing:</b></h4><ul><li>Lead the implementation and power signoff of world-class DDR/HBM/UCIe/Die-to-Die IP at cutting-edge technology nodes.</li><li>Drive timing closure for high-speed designs (above ~2GHz), ensuring robust performance and reliability.</li><li>Integrate mixed signal and macro IP, optimizing for area, power, and performance.</li><li>Design and balance clock trees with very tight skew requirements, overcoming complex technical challenges.</li><li>Collaborate daily with local and US-based teams, providing technical expertise and updates on project status.</li><li>Mentor and technically lead a team of 4-6 junior engineers, fostering skill development and project success.</li><li>Utilize industry-standard tools such as DC, ICC2, PT-SI for physical design and signoff tasks.</li><li>Represent Synopsys on business unit and company-wide projects, networking with senior internal and external stakeholders.</li></ul><h4><br/></h4><h4><b>The Impact You Will Have:</b></h4><ul><li>Deliver high-quality, high-performance DDR/HBM/UCIe/Die-to-Die IP solutions that enable next-generation silicon products.</li><li>Enhance the efficiency and reliability of physical design flows at advanced process nodes.</li><li>Accelerate project timelines through effective leadership and technical problem-solving.</li><li>Drive innovation in clock tree synthesis and timing closure, setting industry benchmarks.</li><li>Strengthen Synopsys’ reputation as a leader in IP implementation and silicon design.</li><li>Mentor and uplift junior engineers, contributing to the growth and success of the broader team.</li><li>Facilitate seamless cross-functional and global collaboration, ensuring project alignment and delivery.</li><li>Influence company-wide initiatives and represent the team in strategic discussions.</li></ul><h4><br/></h4><h4><b>What You’ll Need:</b></h4><ul><li>Minimum of 9+ years of hands-on experience in ASIC physical design, preferably with DDR/HBM/UCIe/Die-to-Die IP.</li><li>Strong proficiency with industry-standard EDA tools such as Design Compiler (DC), IC Compiler II (ICC2), and PrimeTime SI (PT-SI).</li><li>Demonstrated expertise in timing closure at high frequencies (&gt;2GHz) and clock tree synthesis with tight skew control.</li><li>Experience in mixed signal and macro IP integration at advanced technology nodes.</li><li>Proven ability to lead and mentor engineering teams, driving project execution and technical excellence.</li><li>Prior knowledge in DDR power signoff and power optimization strategies is a plus.</li><li>Excellent communication skills for technical interaction across global teams.</li></ul><h4><br/></h4><h4><b>Who You Are:</b></h4><ul><li>Innovative thinker with a proactive approach to problem-solving.</li><li>Strong team player who values collaboration and inclusion.</li><li>Effective communicator, able to articulate complex technical concepts clearly.</li><li>Adaptable and resilient, thriving in fast-paced and dynamic environments.</li><li>Mentor and leader, passionate about guiding and developing talent.</li><li>Detail-oriented with a commitment to delivering high-quality results.</li></ul><h4><br/></h4><h4><b>The Team You’ll Be A Part Of:</b></h4><p>You will join the SNPS DDR/HBM/UCIe/Die-to-Die IP implementation team, a diverse and forward-thinking group dedicated to designing and delivering cutting-edge silicon solutions. The team is known for its technical depth, collaborative spirit, and commitment to excellence. You will work alongside experts in physical design, verification, and IP integration, contributing to the development of industry-leading products and technologies.</p><h4><br/></h4><h4><b>Rewards and Benefits:</b></h4><p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p></h4><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

<p>Director Applications Engineering- DFT</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            Director Applications Engineering- DFT
                                                                                    



                                                Job ID
                                            

                                                                                            12649
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Bengaluru
                                                                                    



                                                Date Posted
                                            

                                                                                            02-Sep-2025
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            Applications Engineering
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<h4 id="isPasted"><b>We Are:</b><p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p><p><br/></p><h4><b>You Are:</b></h4><p>You are a visionary leader, passionate about fostering technical excellence and driving business growth. With a deep understanding of digital design technologies—especially in Design for Test (DFT), Synthesis, or related domains—you thrive in dynamic, high-impact environments. You possess a strong track record of leading engineering teams, inspiring innovation, and delivering customer-centric solutions. Your experience spans project management, strategic planning, and customer engagement, enabling you to act as a trusted advisor to both internal stakeholders and external partners.<br/><br/>You are adept at building and nurturing cross-functional relationships, translating complex technical feedback into actionable business insights, and steering teams toward operational excellence. You excel at communicating with clarity and empathy at all levels, from engineers to senior executives. Your global mindset and collaborative spirit empower you to manage distributed teams, drive process improvements, and cultivate a culture of accountability and continuous learning. Above all, you are committed to making a difference—helping customers achieve their goals while advancing Synopsys’ mission of technological leadership.</p><p><br/></p><h4><b>What You’ll Be Doing:</b></h4><ul><li>Lead and expand the Applications Engineering team focused on delivering advanced DFT solutions across India.</li><li>Define, communicate, and execute strategic initiatives to increase Synopsys’ market presence and customer success.</li><li>Act as a senior technical leader and trusted advisor, ensuring that Synopsys’ DFT offerings align with customer requirements.</li><li>Build and maintain strong partnerships with senior customer stakeholders, driving long-term engagement and satisfaction.</li><li>Translate customer feedback into actionable insights for product development, roadmap planning, and process enhancement.</li><li>Oversee multiple concurrent projects, managing cross-functional collaboration and ensuring timely, quality delivery.</li><li>Drive process improvements, standardization, and knowledge sharing within the Applications Engineering function.</li><li>Promote a culture of innovation, accountability, and continuous learning.</li></ul><p><br/></p><h4><b>The Impact You Will Have:</b></h4><ul><li>Champion customer success by delivering best-in-class DFT solutions, accelerating time-to-market for semiconductor leaders.</li><li>Shape the strategic direction of Synopsys’ Hardware, Analytics, and Test business in India, driving growth and innovation.</li><li>Influence product development with actionable customer insights, enhancing Synopsys’ competitive edge.</li><li>Foster operational excellence and process improvement, setting new standards for quality and efficiency.</li><li>Enable high-performing teams to execute complex projects, contributing to successful tape-outs and robust design flows.</li><li>Strengthen Synopsys’ reputation as a trusted partner to top-tier customers and industry leaders.</li></ul><p><br/></p><h4><b>What You’ll Need:</b></h4><ul><li>Extensive experience in DFT, Synthesis, or other front-end digital design technologies.</li><li>Proven ability to lead cross-functional engineering teams and manage complex technical programs.</li><li>Strong project management skills, including risk identification, mitigation, and contingency planning.</li><li>Exceptional verbal and written communication skills, with the ability to influence at all organizational levels.</li><li>Proficiency in Microsoft Office tools (PowerPoint, Excel, Word) and familiarity with technical documentation standards.</li><li>BSEE, MSEE, PhD, or equivalent with 15+ years of relevant industry experience (preferred).</li><li>Experience in customer-facing roles and global team management is highly desirable.</li><li>Familiarity with Synopsys tools and methodologies is a strong plus.</li></ul><p><br/></p><h4><b>Who You Are:</b></h4><ul><li>Strategic thinker with a global perspective and business acumen.</li><li>Inspirational leader who fosters collaboration, innovation, and accountability.</li><li>Strong communicator, able to distill complex technical concepts for diverse audiences.</li><li>Customer-focused and adept at building lasting partnerships.</li><li>Resilient and adaptable in fast-paced, evolving environments.</li><li>Committed to continuous learning and development—for yourself and your team.</li></ul><p><br/></p><h4><b>The Team You’ll Be A Part Of:</b></h4><p>You’ll join Synopsys’ Hardware, Analytics, and Test Business Unit, a high-impact group dedicated to empowering semiconductor companies with best-in-class DFT technologies. Our Applications Engineering team coaches customers, demonstrates industry-leading practices, and ensures successful tape-outs by building and executing optimized flows. Collaboration, innovation, and shared success define our culture as we help customers achieve high-quality designs and accelerate time-to-market.</p><h4><b>Rewards and Benefits:</b></h4><p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p></h4><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Executive Level

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