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Bluetooth Testing Engineer Responsibilities:Test Planning and Design:• Develop comprehensive test plans and strategies for Bluetooth and co-existence testing.• Design test cases to assess Bluetooth device performance in the presence of other wireless technologies (e.g., Wi-Fi, LTE, Zigbee).• Identify potential interference sources and scenarios for coexistence testing. Test Execution:• Set up and configure test environments, including hardware and software components.• Execute test cases and record detailed results.• Utilize test equipment such as spectrum analyzers, network analyzers, and Bluetooth protocol analyzers.• Perform automated and manual testing to assess coexistence performance. Analysis and Reporting:• Analyze test results to identify issues related to coexistence and interference.• Collaborate with cross-functional teams to diagnose and resolve coexistence issues.• Document test procedures, results, and findings in detailed reports.• Provide recommendations for improving Bluetooth coexistence performance. Requirements•Bachelor’s or master’s degree in computer science, Electrical Engineering, or a related field.•3 to 6 years of experience in BT Testing or embedded systems.•Strong problem-solving and analytical skills.

Eximietas Design

Test Engineer

Verification EngineerThe Verification Engineer will be responsible for ensuring the quality and reliability of hardware and network systems. They will work closely with the engineering team to develop and execute verification plans, analyze test results, and identify and resolve any issues. The role requires strong problem-solving skills, attention to detail, and the ability to work effectively in a team environment.

eInfochips ( An Arrow Company )

Testing Engineer

WLAN Developer Key Responsibilities<ul><li>Extensive experience in WLAN Driver development.</li><li>Exposure to Android is good to have</li><li>Proficiency in programming languages such as C/C++ for embedded systems.</li><li>Knowledge of WLAN protocols (802.11a/b/g/n/ac/ax) and standards.</li><li>Familiarity with ARM Based chipsets, drivers, and WLAN software development kits.</li><li>Strong problem-solving skills and ability to troubleshoot complex WLAN issues.</li><li>Effective communication and collaboration skills in a team environment.</li></ul> Requirements<ul><li>Bachelor’s or master’s degree in computer science, Electrical Engineering, or a related field.</li><li>3 to 6 years of experience in WLAN or embedded systems.</li><li>Strong problem-solving and analytical skills.</li></ul>

Synopsys India Pvt Ltd

Embedded Systems Engineer<div data-field="description" class="jd-description">Introduction As a Hardware Developer at IBM, you’ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today’s market. Your Role and Responsibilities As the Processor Logic Design Manager these are some of the key responsibilites: Manage Project deliveries adhering to quality and schedule requirements Work with Global team to ensure that resource allocation for key project tasks are fulfilled Update status in local and global Project Status Meeting #ISAISDLESD24 Required Technical and Professional Expertise <ul><li>10+ years of creative experience in Semiconductor industry;</li><li> 3+ years as a People Manager </li><li>Understanding and experience in management of at least 1 generation of Processor/ASIC/SOC/IP project development life cycle (Hands-on Logic Design/Functional Verification experience is a plus)</li><li>Experience in project planning - sizing, staffing, risk forecast & mitigation</li><li>Excellent communication skills and experience with global stakeholder interactions</li><li>Preferred : Exposure to Processor Core/Un-Core units, external interface protocols</li><li>Good interpersonal skills and excellent communication skills</li><li>Adopted Agile, DevOps, and Design Thinking methodologies at work</li><li>Experience working in a global team environment</li></ul> Preferred Technical and Professional Expertise <ul><li>Prior experience in people management and understanding of business process</li><li>Exposure to Agile methodology.</li></ul></div>

Ibm India Private Limited

Embedded Systems Engineer

Windchill Architect We are looking for skilled professionals in PTC Windchill for below role: Job Role:&nbsp;Windchill ArchitectExperience: 10 -14 yearsLocation: Hyderabad Immediate joiners are preferred. Interested candidates, please send your resume.

Birlasoft Limited

Architect

Storage Firmware Developer Key Responsibilities<ul><li>Develop and maintain firmware for storage devices.</li><li>Implement new features and optimize existing functionalities.</li><li>Perform debugging and troubleshooting of firmware issues.</li><li>Collaborate with cross-functional teams to ensure seamless integration of firmware with hardware.</li><li>Create and maintain documentation for firmware development processes.</li></ul> Requirements<ul><li>Bachelor’s or master’s degree in computer science, Electrical Engineering, or a related field.</li><li>2 to 10+ years of experience in firmware development for storage or embedded systems.</li><li>Strong firmware design and debug experience using assembly and C programming.</li><li>Deliver on cutting-edge storage products with interfaces like SAS, SATA, NVMe, PCIe.</li><li>Work with cross functional teams to develop HDD/SSD/NAND products would be a strong plus.</li><li>Strong problem-solving and analytical skills.</li></ul>

Embedded Software Developer

WLAN Test Engineer Experience: 4+ YearsThis job might be for you if<ul><li>You enjoy solving problems. You love taking on difficult challenges and finding creative solutions.</li><li>You don’t know the answer but will dig until you find it.</li><li>You communicate clearly. You write well.</li><li>You are motivated and driven. You volunteer for new challenges without waiting to be asked. You will take ownership of the time you spend with us and make a difference.</li><li>You can impress our customers with your enthusiasm to solve their issues (and solve them!)</li></ul> Job OverviewAs a WLAN Test Engineer, your primary responsibility is to assess the functionality and performance of wireless networks/Devices. This includes conducting various tests to verify the network's speed, coverage, security, and overall reliability. You'll collaborate with Developers and quality assurance teams to identify and resolve any issues that may arise during testing. Additionally, you may be involved in designing test plans, executing test cases, analysing test results. Job Description<ul><li>Develop and execute test plans and test cases to assess WLAN performance, reliability, and security.</li><li>Conduct manual and automated tests to validate network configurations, protocols, and features.</li><li>Perform regression testing to ensure that new changes or updates do not adversely affect network functionality.</li><li>Identify, isolate, and document defects or issues found during testing, and work closely with development teams to resolve them.</li><li>Collaborate with cross-functional teams to understand product requirements and provide input on design and implementation considerations.</li><li>Utilize testing tools and equipment to simulate real-world network scenarios and assess performance under different conditions.</li><li>Analyze test results and provide detailed reports to stakeholders, including recommendations for network optimization and improvement.</li><li>Stay updated on industry trends, best practices, and emerging technologies related to WLAN</li><li>testing and network management.</li></ul> Qualifications<ul><li>Bachelor’s degree in Computer Science, Information Technology, Electrical Engineering, or a related field.</li><li>Proven experience in WLAN testing, network testing, or a similar role.</li><li>Proficiency in network protocols such as TCP/IP, UDP, DHCP, DNS, and HTTP.</li><li>Strong understanding of wireless networking technologies, including Wi-Fi standards (802.11a/b/g/n/ac/ax), RF fundamentals, and WLAN security protocols (WPA, WPA2, WPA3).</li><li>Familiarity with network testing tools and equipment such as traffic generators, protocol analyzers, spectrum analyzers, and wireless sniffers.</li><li>Experience with Android tools and devices is preferred.</li><li>Excellent analytical and problem-solving skills, with the ability to troubleshoot complex network issues.</li><li>Effective communication skills, with the ability to collaborate with cross-functional teams and communicate technical concepts to non-technical stakeholders.</li><li>Detail-oriented approach with a commitment to producing high-quality work and delivering accurate test results.</li></ul>

Associate Network Engineer

Design for Test Engineer Job DescriptionWe are seeking an experienced and highly skilled Senior SOC Design for Test Engineer with a minimum of 5 years of hands-on experience in SOC Design for Test. As a key member of our team, you will play a pivotal role in ensuring the testability, manufacturability, and quality of our cutting-edge System on Chip designs Key Responsibilities<ul><li>Lead and manage SOC Design for Test efforts for complex projects, ensuring the successful execution coverage, manufacturability, and quality plans.</li><li>Develop full chip and block level DFT implementation from the DFx Specifications and product coverage, quality, and manufacturability goals. Define and implement Test controllers at top level and block level, fuse controllers, test clocking strategy, chip I/O test strategy and HSIO test strategy.</li><li>Define JTAG TAP, boundary scan, I/O Test JTAG access, IEEE1687 iJTAG network and instrument design and implementation. Define the Test Interface for each of the P&amp;R IP blocks for Scan, MBIST and other test interfaces.</li><li>Define hierarchical block isolation, Test clocking and On Chip Clock controllers and reset methodology. Define scan and MBIST timing at the top level and block level timing.</li><li>Analyse block level RTL or gates to ensure that scalability and coverage is satisfied as per the design goals. Ensure that DFT is provided to fix the DFT violations to ensure that the design goals are meet.</li><li>Analyse compression requirements for each of the blocks, define Intest and Extest compression requirements and define the requirements for compression engines. Synthesize compression engines for each of the blocks. Create the collaterals for compression for the IPs.</li><li>Block level scan insertion as well as development of the scan wrappers for the blocks. Do scan insertion on the blocks, analyse scan DRC, implement DFT fixes. Create scan protocol files for designs, create scan inserted netlist, create scan definitions as well as scan definition files for PD. Perform ATPG on the scan inserted netlist, analyse DRC and coverage violations.</li><li>Deep knowledge of different scan models Stuck-at, transition test, path-delay, bridging, cell aware, small-delay transition, IDDQ test etc. Ability to analyse coverage for each of the model types.</li><li>Running GLS with or without timing for the scan vectors. Ability to debug the failures and working with timing and PD teams to fix the timing issues.</li><li>Understanding of pattern delivery to the post-silicon test engineering teams. Delivering to the Test engineering the Test pin muxing and other full chip requirements for the Test Engineering Team. Understanding tester requirements and delivering the patterns in the formats that the tester teams needs.</li><li>Implement pattern retargeting. Create grey box models for blocks. Coverage analysis of full chip consolidating Intest and Extest patterns. Knowledge of Top level scan architecture and creating flow to create pattern retargeting.</li><li>Knowledge of Streaming Scan Network and other Top level scan pin sharing and implementing the block to top level pattern generation for this flow.</li><li>Implementing Memory Testing and MBIST. Knowledge of Memory defect models and test algorithms. Knowledge of memory bit mapping and redundancy analysis. Implementing memory repair and fuse sharing among various memory.</li><li>Knowledge of LogicBIST with Test point insertion, X-blocking.</li><li>Full chip DFT delivery for tapeout including but not limited to DFT netlist verification, pattern delivery, Tester requirements.</li><li>Debug DFT patterns post silicon, ability to analyse chain test patterns for failures, scan pattern failures. Analyse MBIST pattern failures, yield and repair debug.</li><li>Ability to perform volume diagnostics on the parts to isolate and improve the patterns.</li></ul> Requirements<ul><li>Bachelor’s degree in computer science, Electrical/Electronics Engineering, or related field. OR master’s degree in computer science, Electrical/Electronics Engineering, or related field. OR PhD in Computer Science, Electrical/Electronics Engineering, or related field.</li><li>5+ years of hands-on experience in SOC Design for Test.</li><li>Expertise in DFT tools and flows in scan intertion, ATPG, GLS simulation, diagnosis flows.</li><li>Prior experience working on IP level and SOC level DFT projects.</li><li>Proficient in DFT tools from Siemens (Tessent), Synopsys DFTmax, Tetramax, Spyglass DFT advisor, Genius DFT, Modus, VCS, Xcelium etc.</li><li>Worked in full chip design or complex IP delivery in the area of DFT.</li><li>Experience in post silicon debug, diagnosis and yield enhancements is a plus.</li></ul>

Senior Test Engineer

Consultant - Repair Engineer Capgemini is hiring below position:- Designation: ConsultantExperience: 4–6 Years Job Skill: Repair EngineerLocation: Bengaluru Note: Please mention the Designation while sharing your CV for reference.To apply, please email your CV.

Capgemini

Repair Engineer

Consultant - Fatigue & Damage Tolerance Engineer Capgemini is hiring below position:- Designation: ConsultantExperience: 4–6 Years Job Skill: Fatigue &amp; Damage Tolerance EngineerLocation: Bengaluru Note: Please mention the Designation while sharing your CV for reference.To apply, please email your CV.

Fabrication Quality Engineer

Python Automation Testing Qualification Required:<ul><li>Typically requires minimum of 3 years of experience in Python Automation</li><li>Bachelors OR Master’s Degree Engineering in Electronics</li></ul> Roles And Responsibilities<ul><li>Perform thermal testing on consumer electronic products using thermal chambers and relevant data acquisition equipment</li><li>Prepare detailed test-plans to assess thermal health of the consumer electronic products by considering regular and corner end-consumer scenarios.</li><li>Setup the devices for test use cases by following the device related commands.</li><li>Deliver results with high fidelity test data with minimal guidance and proactively report the test status to the client.</li><li>Document and present test results clearly capturing all test related details in slides or White-Paper format</li><li>Diagnose / debug any simple hardware or software related issues in the consumer electronic products.</li><li>Interact with cross-functional teams like thermal, electrical, software teams in different Geo locations (US, China, India)</li><li>Perform thermal simulations using commercial computational fluid dynamics (CFD) tools such as FloTherm XT and StarCCM+</li><li>Perform modification to automation code for performance testing; write / modify python code as needed.</li><li>Maintain inward and outbound documents / records for all lab equipment and devices.</li></ul> Required Technical And Professional Expertise:<ul><li>Excellent with Python scripting</li><li>Experience in Python automation Testing</li><li>Experience with Hardware testing and relevant tools</li></ul>

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Engineering - Hardware & Networks Jobs - 1752 Verified Vacancies

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