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<p>BSP Developer</p><p><br></p><p>Key Skills:</p><p>&nbsp;◾ BSP (Board Support Package) Development</p><p>&nbsp;◾ Embedded Systems Programming</p><p>&nbsp;◾ Diag, USB, Storage, PMIC</p><p>&nbsp;◾ Expertise in Clock Management, Buses &amp; Peripherals</p><p>&nbsp;◾ Strong Knowledge of Memory Management in Embedded Systems</p><p><br></p><p>Experience: 3 – 5 Years</p><p><br></p><p>Share your updated resume now.</p>

MosChip Technology Ltd

Developer

<p>Linux Device Driver Developer</p><p><br></p><p>Capgemini is hiring for Linux Device Driver Developer (LDD) can join in 30 Days, and possess the required skill set, apply to this job.</p><p><br></p><p><strong>Experience</strong>: 4- 10 years</p><p><br></p><p><strong>Key Requirements</strong>:</p><p>1. 3-5 Yrs of experience in Embedded Linux Kernel/Drivers domain</p><p>2. Embedded Software development and porting on Linux and ARM platforms</p><p>3. Strong Programming skills on C &amp; Data Structures</p><p>4. Expertise on OS (Memory Mgmt, Scheduling, IPC, Multi-threading/processing)</p><p>5. Experience in Linux Kernel/Device Drivers</p><p>6. Proficiency in debugging embedded systems, including using tools like JTAG</p><p>7. Understanding of System architecture and debugging at a system level.</p><p><br></p><p>Please send your resume with the following details:</p><p>Subject Line: Job Application- LDD (Linux Device Drivers)</p><p>Name:</p><p>Total Exp:</p><p>Rel exp:</p><p>Current CTC:</p><p>ECTC:</p><p>Current location:</p><p>Are you willing to relocate?</p><p>Notice period/ LWD:</p>

Capgemini

Linux Engineer

<p>Embedded Software Developer- Automotive</p><p><br></p><p><strong>Experience:&nbsp;</strong>4-8 Years</p><p><strong>Job Category:&nbsp;</strong>Embedded Software</p><p><br></p><p><strong>You will be responsible for :</strong></p><p>• Implement sensing, control algorithms</p><p>• Device drivers development for embedded controllers</p><p>•Develop automotive software components according to AUTOSAR Model-Based Design</p><p>• Deliver highly reliable system-level software</p><p>• Follows safety and regulatory compliance requirements.</p><p><br></p><p><strong>Skills:</strong></p><p>• Strong C Experience</p><p>• Understanding of MISRA-C guidelines</p><p>• Experience with ADAS, Infotainment, V2X, Telematics features</p><p>• Experience with QNX, LYNXOS-178 or Automotive Grade Linux</p><p>• Experience with CAN, CAN-FD, SAE J1939, UDS/ISO 14229, LIN</p><p>• Comprehensive experience with Vector CAN Tools (CANalyzer, CANoe)</p><p>• Experience with OCPP, ISO 15118, OBD2 (SAE J1979), AUTOSAR standards</p><p>• Strong analytical and debugging skills</p>

Modernize Chip Solutions

Embedded Software Developer

<p>Infrastructure Engineering III</p><p>Your role will be instrumental in shaping the future at one of the world's largest and most influential companies.</p><p>As a member of our Infrastructure Platforms Engineering team, you will  join a high-performing team dedicated to developing and deploying large-scale infrastructure solutions that support JPMorgan Chase and Co.’s diverse and critical businesses. You'll be using the latest technologies, data management, and security practices in all aspects of Infrastructure and software development. Critical thinking, clear communication, and collaboration are key to successful product delivery.</p><br/><strong>Job responsibilities</strong><ul><li>Executes creative solutions for the design, development, and technical troubleshooting for problems of high complexity</li><li>Applies technical expertise and problem-solving methodologies to projects of large scope</li><li>Drives a work stream or project consisting of one or more infrastructure engineering technologies</li><li>Works with other platforms to architect and implement changes required to resolve issues and modernize the organization and its technology processes</li><li>Strongly considers upstream/downstream data and systems or technical implications and advises on mitigation actions</li><li>Adds to team culture of diversity, equity, inclusion, and respect</li><li>Flexible to work in off hours/weekends &amp; in 24x7 on-call rotation.</li></ul><p> </p><p><strong>Required qualifications, capabilities, and skills</strong></p><ul><li><p>Formal training or certification on infrastructure engineering concepts and 3+ years applied experience</p></li><li>Very good understanding in multiple infrastructure technologies and protocols including Global and Local load balancing, DNS, network routing, switching, firewalls and proxies.</li><li>Good knowledge and understanding of REST/JSON, API implementation and container based technologies.</li><li>Experience with programmatic methods of network device interaction, configuration and lifecycle management.</li><li>Thorough understanding of business technology drivers and their impact on architecture design, performance and monitoring, best practices.</li><li>Strong critical-thinking and problem-solving skills with clear communication.</li><li>Ability to collaborate with different teams and roles to achieve common goals.</li><li>Hands on experience with Atlassian products such as JIRA, Bitbucket, and Confluence.</li><li>Advanced knowledge and experience with network load balancing in F5 Load balancing technology (GTM, LTM, ASM, APM, AFM)</li><li>Extensive experience working in operations and troubleshooting complex configuration or device issues in Load balancing.</li><li><p>Experience working in CLI (command line interface)</p> </li></ul> <strong>Preferred qualifications, capabilities, and skills</strong><ul><li>F5 Certifications will be preferred but not desirable, like BIG-IP TMOS Administration (201) and LTM Technology Specialist (301)</li><li>Proficient in one programming language (ex. Python) and automation framework (Ansible)</li><li>Ability to multi-task across project/initiatives and deliver according to time commitments</li><li>Experience with Infrastructure as Code – IaC implementation.<br/></li></ul><h4>Experience Level</h4>Senior Level

JP Morgan Services India Pvt Ltd

Technical Engineer

<p>Principal - ASIC Digital Design (Physical Implementation/Design/STA)</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            Principal - ASIC Digital Design (Physical Implementation/Design/STA)
                                                                                    



                                                Job ID
                                            

                                                                                            6673
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Noida
                                                                                    



                                                Date Posted
                                            

                                                                                            28-Sep-2024
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            ASIC Digital Design
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<p id="isPasted"><span id="isPasted">Principal - </span>ASIC Digital Design (<span id="isPasted">Physical Implementation/Design/STA, experience - 12+ Years)</span> </p><p>We Are:<br/><br/>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.<br/><br/>You Are:<br/><br/>You are a highly skilled and experienced ASIC Digital Design Engineer passionate about working on the latest processes for STA and physical implementation flows on cutting-edge technology nodes. You thrive in dynamic environments and excel in collaborating with functional teams to optimize and develop IO validation vehicles, Mixed Signal IPs, 3DIO PHYs and UCIe-3D PHY. You have a strong focus on Timing Closure and are adept at defining signoff criteria. Your background includes extensive experience with ASIC design flow, hierarchical physical design strategies, and a deep understanding of sub-micron technology issues. You possess a strong knowledge of timing analysis, constraints management, and various verification strategies, including Primepower-based power analysis. Your scripting skills are excellent, and you are innovative, self-motivated, and able to work both independently and as part of a team. Your communication skills, both verbal and written, are outstanding, and you have a desire to understand RTL/Timing signoff criteria.<br/><br/>What You’ll Be Doing:<br/><br/>* Working on new processes for physical implementation flows and cutting-edge technology nodes.<br/>* Collaborating with functional teams to optimize and develop Qualificaition vehicles and 3D PHYs.<br/>* Defining signoff criteria with a strong focus on Timing Closure.<br/>* Maturing the physical implementation guide used for customers and internal hardening teams.<br/>* Participating in next-generation physical design methodology and flow development.<br/>* Performing physical design implementation, including synthesis, floor planning, PG Grid design, PnR, CTS, STA, and power/signal integrity signoff.<br/>* Evaluating PPA targets (Area/Speed/Power) and collaborating with the design team to improve design and constraints.<br/><br/>The Impact You Will Have:<br/><br/>* Ensuring the optimization and successful implementation of cutting-edge technology nodes.<br/>* Contributing to the development of high-performance silicon chips and software content.<br/>* Enhancing the efficiency and performance of Synopsys’ IPs through rigorous timing closure and signoff criteria.<br/>* Improving customer satisfaction by maturing physical implementation guides.<br/>* Supporting the achievement of Synopsys' operational goals through innovative design solutions.<br/><br/>What You’ll Need:<br/><br/>* Extensive experience with ASIC design flow and hierarchical physical design strategies.<br/>* Strong background in timing analysis, constraints management, and frontend synthesis.<br/>* Experience with physical-aware synthesis, formality, and various verification strategies.<br/>* Knowledge of Primepower-based power analysis and clock gating for power reduction.<br/>* Fair knowledge of FC design planning methodologies, floor planning, and PG Grid creation using Synopsys Tools.<br/>* Strong physical implementation flow debugging skills and scripting abilities.<br/><br/>Who You Are:<br/><br/>Innovative, self-motivated, and able to work independently or as a team player. Excellent verbal and written communication skills. Strong analytical and problem-solving abilities. Passionate about continuous learning and staying updated with the latest technological advancements in ASIC digital design.<br/><br/>The Team You’ll Be A Part Of:<br/><br/>You will join a highly skilled and collaborative team focused on developing and optimizing physical design flows for cutting-edge technology nodes. The team is dedicated to innovation, continuous improvement, and delivering high-performance solutions that meet the evolving needs of our customers.<br/><br/>Rewards and Benefits:<br/><br/>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

Synopsys India Pvt Ltd

Mechanical CAD Designer

<p>Teamcenter/PLM Architect</p><p>We are seeking a highly skilled Senior Software Engineer with a strong background in Product Lifecycle Management (PLM) systems and cloud-based solutions. The ideal candidate will have extensive experience with Java/Spring Boot, microservices architecture, and cloud platforms, particularly Google Cloud Platform (GCP). Proficiency in NOSQLDB is also required.</p><p>Strong knowledge in PLM Teamcenter Architecture, Customization (ITK, SOA, RAC and AWC) and configurations. </p><p>Design and build scalable microservices using Java/Spring Boot.</p><p>Leverage Google Cloud Platform (GCP) to deploy, manage, and optimize cloud-based applications.</p><p>Utilize MongoDB for data storage, ensuring optimal performance and reliability.</p><p>Collaborate with cross-functional teams to integrate PLM systems with other enterprise applications.</p><p>Participate in the full software development lifecycle, including requirements gathering, design, development, testing, and deployment.</p><p>Troubleshoot and resolve technical issues, providing timely and effective solutions.</p><p>Strong knowledge in PLM Teamcenter Architecture, Customization (ITK, SOA, RAC and AWC) and configurations. </p><p>Design and build scalable microservices using Java/Spring Boot.</p><p>Leverage Google Cloud Platform (GCP) to deploy, manage, and optimize cloud-based applications.</p><p>Utilize MongoDB for data storage, ensuring optimal performance and reliability.</p><p>Collaborate with cross-functional teams to integrate PLM systems with other enterprise applications.</p><p>Participate in the full software development lifecycle, including requirements gathering, design, development, testing, and deployment.</p><p>Troubleshoot and resolve technical issues, providing timely and effective solutions.</p><h4>Experience Level</h4>Senior Level

Ford Motor

Senior Software Engineer

<p>Principal Hardware Engineering, Analog Validation Engineer</p><h4>Company Description</h4><p>Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.</p><p>Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.</p><p>Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.</p><h4>Job Description</h4><p><strong><u>Analog/ Electrical Validation and Characterization Engineer</u></strong></p><p>Sandisk, a global storage leading company, is looking for an experienced hardware technical leader for developing characterization methods and be the technical team leader.</p><p>As a characterization engineer you will focus on hands-on multi-disciplinary characterizations and Failure Analyses of Flash memory products as well as technically leading your team mates.</p><p><u>Summary of essential job functions:</u></p><ul><li>Perform comprehensive characterization methods of embedded memory company products, including developing and implementing new testing protocols</li><li>Characterize high speed SerDes interfaces, practice signal and power integrity analyses, analog IPs and execute failure analyses and product integration activities in SNDK labs</li><li>Demonstrate good understanding of Analog/HW Validation flow with hands-on experience in PCIE/UFS/DDR interfaces</li><li>Technically lead and mentor a team of HW validation engineers, providing guidance on complex issues and fostering professional growth</li><li>Design and execute test plans for new product validation, ensuring thorough coverage of all critical parameters</li><li>Analyze and interpret complex data sets, preparing detailed reports and presentations for both technical and non-technical audiences</li><li>Collaborate with cross-functional teams including design, product, and manufacturing to resolve technical issues and improve product performance</li><li>Stay current with industry trends and emerging technologies in flash memory and analog validation techniques</li><li>Develop and maintain documentation for validation processes, test procedures, and best practices</li><li>Participate in design reviews and provide valuable input on product testability and validation strategies</li><li>Troubleshoot and debug complex hardware issues, utilizing advanced lab equipment and analytical skills</li><li>Optimize existing validation processes to improve efficiency and reduce time-to-market</li><li>Contribute to the development of internal tools and automation scripts to enhance validation capabilities</li><li>Represent the validation team in technical discussions with customers and partners when required</li></ul><h4>Qualifications</h4><p><u>Requirements:</u></p><ul><li>B.E in Electronic &amp; Electrical Engineering </li><li>Hands on proven experience of 7-12 years in lab measurements - must</li><li>Familiarity with high end Oscilloscopes, TDR, PS measurements - must</li><li>Familiarity with Sampling scope, VNAs &amp; BERTs – an advantage</li><li>Working experience with USA based companies – an advantage</li></ul><h4>Additional Information</h4><p>Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.</p><p>Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at <a href="mailto:jobs.accommodations@sandisk.com">jobs.accommodations@sandisk.com</a> to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.</p><h4>Experience Level</h4>Senior Level

SanDisk India Device Design Centre Pvt.Ltd

Electronic Engineer

<p>Principal Hardware Development Engineering</p><h4>Company Description</h4><p>Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.</p><p>Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.</p><p>Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.</p><h4>Job Description</h4><p>We are seeking a Principal Hardware Development Engineer to join our innovative team in Bangalore , India. In this l role, you will drive the development of cutting-edge hardware solutions, guiding projects from concept to production.</p><ul><li>Lead and mentor a team of hardware engineers, fostering innovation and technical excellence</li><li>Develop and implement hardware architecture strategies aligned with product roadmaps</li><li>Oversee the entire hardware development lifecycle, from initial concept to mass production</li><li>Collaborate with cross-functional teams to ensure seamless integration of hardware and software components</li><li>Conduct technical reviews and provide expert guidance on complex hardware design challenges</li><li>Establish and maintain best practices for hardware development processes and methodologies</li><li>Evaluate new technologies and components to enhance product performance and competitiveness</li><li>Manage relationships with key vendors and external partners</li><li>Contribute to intellectual property development and patent applications</li></ul><h4>Qualifications</h4><ul><li>Master's degree in Electrical Engineering or related field with 10+ years of experience in hardware development and leading complex projects</li><li>Advanced knowledge of hardware design principles, PCB design, and high-speed interfaces (e.g., PCIe, UFS, LPDDR)</li><li>Expertise in CAD tools, simulation software, and lab equipment (oscilloscope, TDR, VNA)</li><li>Strong understanding of electrical engineering principles and manufacturing processes</li><li>Proven ability to lead and mentor engineering teams, with excellent project management skills</li><li>Outstanding analytical, problem-solving, communication, and interpersonal skills</li><li>Experience in product lifecycle management and semiconductor/consumer electronics industry preferred</li><li>Ability to adapt to rapidly changing technologies and market demands</li></ul><h4>Additional Information</h4><p>Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.</p><p>Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at <a href="mailto:jobs.accommodations@sandisk.com">jobs.accommodations@sandisk.com</a> to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.</p><h4>Experience Level</h4>Senior Level

Associate Hardware Engineer

<p>Sr.Engineer, Stack</p><b>What you need :</b><br/>• Development experience on Cellular Radio products complying to 3GPP specification for E-UTRA (LTE) and NR• Familiar with communication interfaces Ethernet / TCP/IP / UDP .• Should have good knowledge on RAN protocol and interfaces. o LTE/5G  AS protocol  layers - PHY, MAC, RLC, PDCP, RRC• Excellent Log analysis and debugging skills.• Must be strong in C/C++ Programming and Linux OS.• Hands on experience on debugging in Linux environment with tools like GDB, QXDM, TM500, QCAT etc.• Good to have experience of Git.
<h4>What you will do </h4><ul><li>Developing Cellular Radio products complying to 3GPP specification for E-UTRA (LTE) and NR</li><li>Coding in Linux environment across layer3 and layer2 protocols.  </li><li>Working with Git in Linux environment</li><li>Log analysis and debugging of customer defects and internal QA issues.</li><li>Log analysis using tools like GDB, QXDM, TM500, QCAT etc.</li></ul><h4>Experience Level</h4>Senior Level

PARALLEL WIRELESS INDIA PRIVATE LIMITED

Full Stack Engineer

<p>Staff Engineer (Memory Circuit Design)</p><h4>Company Description</h4><p>Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.</p><p>Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.</p><p>Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.</p><h4>Job Description</h4><p>Responsibilities include:</p><ul><li>In this position the individual will be responsible for designing, modifying and evaluating CMOS circuit structures for the most advanced high-performance low-power 3-dimensional NAND flash memory</li><li>Verify designs in simulation and interact with layout, logic and other functional groups for implementation, full chip integration and silicon validation.</li><li>Evaluation of these circuits will be done through FINESIM and VERILOG simulations.</li><li>Collaborate with characterization engineers to fully characterize silicon, and partner with other designers to develop solutions for silicon issues</li><li>Responsible for full chip silicon evaluation through probing.</li><li>Interact with Memory Device team for transistor models, EDR/GDR requirements and tradeoffs.     </li><li>CMOS transistor level design, simulation, layout knowledge of common custom circuits like amplifiers, current mirrors, level shifters, switches, decoders.</li><li>Knowledge of running and debugging Verilog simulations</li><li>Good understanding of Solid-State device physics.</li><li>Comfortable with IC tools such as Cadence analog design environment, HSPICE/FINESIM, VCS/EXCELIUM, UNIX.</li><li>Ability to troubleshoot and analyze complex problems.</li><li>Excellent communication skills to effectively collaborate with Off-site counterparts across global teams</li></ul><h4>Qualifications</h4><ul><li>B.E./B.Tech/M.E/M.S/M.Tech in electronics branches</li><li>Aggregate of 75% &amp; Above in all qualifying exams</li><li> 4+ years of relevant Industry Experience</li></ul><h4>Additional Information</h4><p>Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.</p><p>Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at <a href="mailto:jobs.accommodations@sandisk.com">jobs.accommodations@sandisk.com</a> to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.</p><h4>Experience Level</h4>Senior Level

Trainee Engineer

<p>Verification Engineer</p><p><br></p><p>MosChip is growing, and we’re on the lookout for experienced professionals to join our dynamic team in Hyderabad!</p><p>Experience - 8 to 11 years</p><p><br></p><p>Share your updated resume now.</p>

Testing Engineer

<p>Memory Layout Engineer - Staff</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            Memory Layout Engineer - Staff
                                                                                    



                                                Job ID
                                            

                                                                                            12499
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Hyderabad
                                                                                    



                                                Date Posted
                                            

                                                                                            07-Aug-2025
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            Layout Design
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<p><br/></p><p><strong>You Are:</strong></p><p>You are an experienced Memory Layout Design Engineer with a passion for developing cutting-edge technology. You possess a Bachelor’s or Master’s degree in Electronics Engineering, Telecommunication, Physics, or related fields. With a minimum of 6 years of experience in layout design, you have advanced knowledge of Custom Layout and a deep understanding of Embedded Memory Layout. Your strong communication, documentation, and analytical skills enable you to collaborate effectively with cross-functional teams. You are detail-oriented, proactive, and thrive in a dynamic environment where innovation and continuous improvement are paramount.</p><p><strong>What You’ll Be Doing:</strong></p><ul><li>Design, develop, and modify layout designs for Embedded Memory IPs.</li><li>Improve and determine methods and procedures for layout development flow to ensure efficiency and accuracy.</li><li>Collaborate with design engineers to optimize layout designs for performance and manufacturability.</li><li>Conduct layout verification and ensure compliance with design rules and specifications.</li><li>Provide technical guidance and mentorship to junior layout engineers.</li><li>Stay updated with the latest industry trends and technologies to incorporate best practices in layout design.</li></ul><p><strong>The Impact You Will Have:</strong></p><ul><li>Enhancing the performance and reliability of our Embedded Memory IPs and other foundational IPs.</li><li>Contributing to the efficiency and effectiveness of our layout development processes.</li><li>Ensuring high-quality and manufacturable layout designs that meet industry standards.</li><li>Supporting the seamless integration of our IPs into customer designs, accelerating their time-to-market.</li><li>Driving innovation in layout design and setting new benchmarks for excellence in the industry.</li><li>Fostering a culture of continuous improvement and technical excellence within the team.</li></ul><p><strong>What You’ll Need:</strong></p><ul><li>Bachelor’s or Master’s degree in Electronics Engineering, Telecommunication, Physics, or related fields.</li><li>Minimum of 6 years of experience in Memory layout design.</li><li>Advanced knowledge of Custom Layout and a deep understanding of Embedded Memory Layout.</li><li>Strong communication, documentation, and analytical skills.</li><li>Proficiency in layout verification tools and methodologies.</li><li>Scripting knowledge in python and/or TCL is highly preferred</li></ul><p><strong>Who You Are:</strong></p><ul><li>Detail-oriented and meticulous in your work.</li><li>Proactive and able to work independently as well as part of a team.</li><li>Excellent problem-solving skills and the ability to think critically.</li><li>Adaptable and open to learning new technologies and methodologies.</li><li>A strong communicator who can effectively collaborate with cross-functional teams.</li></ul><p><strong>The Team You’ll Be A Part Of:</strong></p><p>You will be part of a dynamic and innovative team focused on developing high-performance silicon IPs. Our team collaborates closely with design engineers, verification engineers, and other stakeholders to deliver best-in-class solutions. We are committed to continuous learning and improvement, fostering an environment where creativity and technical excellence thrive.</p><p><strong>Rewards and Benefits:</strong></p><p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p><p><br/></p><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

Computer Engineer

<p>Principal Memory Design Engineer</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            Principal Memory Design Engineer
                                                                                    



                                                Job ID
                                            

                                                                                            12388
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Hyderabad
                                                                                    



                                                Date Posted
                                            

                                                                                            28-Jul-2025
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            R&amp;D Engineering
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<h4 id="isPasted"><strong>Alternate Job Titles:</strong></h4><ul><li>Principal Memory Design Engineer</li></ul><h4><br/></h4><h4><strong>We Are:</strong></h4><p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p><h4><strong>You Are:</strong></h4><p>You are an accomplished and innovative engineer passionate about pushing the boundaries of embedded memory design. With a strong foundation in electrical and electronics engineering, you thrive in dynamic environments where complex problem-solving and creativity are at the forefront. Your expertise in deep submicron and FinFET technology, coupled with hands-on experience in SRAM, register file, TCAM, and ROM architectures, positions you as a technical leader who can address intricate design challenges. You excel in both independent and collaborative settings, proactively seeking solutions and driving projects to timely completion. Your ability to communicate effectively with diverse teams, mentor junior engineers, and network with senior personnel ensures you can influence and inspire across the organization. With a keen eye for detail and a holistic understanding of the full embedded memory design flow, you are committed to delivering state-of-the-art solutions that set industry benchmarks. Your adaptability, customer focus, and continuous learning mindset make you a valued contributor to Synopsys’ mission of technological excellence.</p><h4><br/></h4><h4><strong>What You’ll Be Doing:</strong></h4><ul><li>Develop advanced SRAM, register file, TCAM, and ROM architectures and implement innovative circuit techniques for embedded memory IP.</li><li>Lead schematic entry, simulation of major blocks, layout planning, and supervise layout activities, collaborating closely with the CAD team for full verification and model generation.</li><li>Design and implement low-power, area-efficient embedded memory circuits and architectures, optimizing for performance, power, and area in leading-edge technology nodes.</li><li>Apply and expand your skills in transistor-level circuit design, memory compilers, and automation scripting to streamline design flows.</li><li>Resolve a wide range of technical issues creatively, collaborating with cross-functional teams and interfacing with both internal and external stakeholders.</li><li>Coordinate, facilitate, and monitor daily activities of project teams, ensuring alignment with project goals and timely delivery of milestones.</li><li>Engage in inter-team interactions and maintain a customer-centric approach, frequently networking with senior professionals to share expertise and insights.  </li><li>Proactively prioritize and manage multiple tasks with minimal supervision, driving projects from conception to successful completion.</li></ul><h4><br/></h4><h4><strong>The Impact You Will Have:</strong></h4><ul><li>Drive innovation in embedded memory IP, enabling the design of high-performance, energy-efficient integrated circuits for a global customer base.</li><li>Set new standards in memory design through creative problem-solving and adoption of advanced technology nodes, including FinFET.</li><li>Mentor and empower team members, fostering a collaborative and high-performing engineering culture.</li><li>Enhance Synopsys’ reputation and market leadership by delivering reliable, silicon-proven IP solutions that exceed customer expectations.</li><li>Influence project direction and contribute to strategic decisions by leveraging deep technical knowledge and industry insights</li><li>Facilitate successful project execution by identifying risks, proposing effective solutions, and ensuring timely delivery of high-quality results.</li></ul><h4><br/></h4><h4><strong>What You’ll Need:</strong></h4><ul><li>8+ years of hands-on experience across the full embedded memory design flow: architecture, circuit design, physical implementation, compiler automation, characterization, timing, and model generation.</li><li>BE/B.Tech/ME/M.Tech/MS in Electrical &amp; Electronics Engineering from a premier institute/university.</li><li>Deep understanding of SRAM/register file architectures and advanced custom circuit implementations, with direct experience in FinFET and other advanced technology nodes.</li><li>Expertise in scripting languages such as Perl and Python for design automation and flow optimization.</li><li>Strong grasp of RC circuits (1st and 2nd order), digital design fundamentals (Boolean functions, gates, multiplexers), and transfer function analysis.</li><li>Proficient knowledge of CMOS fundamentals, fabrication processes, and both digital and basic analog design principles.</li></ul><h4><br/></h4><h4><strong>Who You Are:</strong></h4><ul><li>Analytical thinker with a passion for problem-solving and innovation.</li><li>Excellent communicator, capable of articulating complex technical concepts to diverse audiences.</li><li>Strong collaborator and mentor, eager to share knowledge and support team growth.  </li><li>Self-motivated and proactive, adept at managing multiple priorities with minimal supervision.</li><li>Customer-focused, adaptable, and committed to continuous learning and professional development.</li></ul><h4><br/></h4><h4><strong>The Team You’ll Be A Part Of:</strong></h4><p>You will join the Embedded Memory and Logic Team within Synopsys Solutions Group, a high-impact group responsible for the end-to-end development of standard and custom embedded memories. The team’s expertise spans bit cell analysis, architecture design, characterization, verification, and delivery of memory compilers as semiconductor IP. Collaborating across disciplines and sites, the team is dedicated to delivering innovative, silicon-proven solutions that power the world’s most advanced integrated circuits.</p><h4><strong>Rewards and Benefits:</strong></h4><p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

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