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<p>Static Stress Analysis + Isami + Hand calculation</p><p><br></p><p>We're hiring for below position:</p><p><br></p><p><strong>Skills: </strong>Static Stress Analysis + Isami + Hand calculation</p><p><strong>Experience: </strong>6 to 15 years</p><p><strong>Location: </strong>Bangalore</p><p><br></p><p>If interested, share your CV.</p>

Capgemini

Technical Analyst

<p>Functional Validation Professional</p><p><br></p><p>We're hiring below position:</p><p> </p><p><strong>Skills: </strong>Functional Validation </p><p>- Functional Validation activities (NI Test stand, Wireshark, Signalling /Locomotive domain))</p><p><strong>Experience:  </strong>4 to 9 years</p><p><strong>Location: </strong>Bangalore</p><p><br></p><p>If interested, share your CV.</p>

Quality Assurance Associate

<p>Senior Staff SoC Verification Engineer</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            Senior Staff SoC Verification Engineer
                                                                                    



                                                Job ID
                                            

                                                                                            12632
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Bengaluru
                                                                                    



                                                Date Posted
                                            

                                                                                            26-Aug-2025
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            SOC Engineering
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<h4 id="isPasted"><b>We Are:</b><p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p><h4><b>You Are:</b></h4><p>You are an experienced SoC Verification professional, passionate about enabling next-generation technologies and delivering robust, high-quality silicon solutions. You thrive in collaborative and fast-paced environments, leveraging your technical expertise and leadership skills to solve complex verification challenges. With a deep understanding of verification methodologies, protocols, and tools, you are adept at translating customer requirements into actionable plans and driving teams to successful outcomes. You embrace change, quickly ramp up on new tools and methodologies, and enjoy mentoring and empowering others to reach their full potential.</p><p>Your approach is inclusive and you value diverse perspectives, recognizing that innovation flourishes in environments where every voice is heard. You are analytical, detail-oriented, and proactive, always anticipating risks and developing strategies to overcome them. You excel at communicating complex technical concepts to both peers and stakeholders, and you are motivated by the opportunity to make a tangible impact on the products shaping tomorrow’s world. As a leader, you are committed to fostering growth within your team and delivering solutions that exceed customer expectations.</p><h4><br/></h4><h4><b>What You’ll Be Doing:</b></h4><ul><li>Engaging directly with Synopsys customers to understand verification needs and define project scope and activities.</li><li>Developing and implementing system design solutions using Synopsys EDA tools and IP.</li><li>Leading a team of engineers in executing pre-silicon verification activities for IPs and subsystems.</li><li>Anticipating technical challenges and risks, and formulating effective resolution and mitigation plans.</li><li>Mentoring and coaching team members to enhance their technical capabilities and performance.</li><li>Reviewing results and reports to provide constructive feedback, driving continuous improvement in quality.</li><li>Reporting project status to management and recommending solutions to address execution issues.</li><li>Collaborating with architects, designers, and verification teams to ensure seamless project execution.</li><li>Contributing to the evolution of verification methodologies and increasing operational efficiency.</li><li>Rapidly learning and deploying new verification tools and methodologies to enable customer success.</li><li>Partnering with other Synopsys teams, including Business Unit Application Engineers and Sales, to broaden and deploy tool and IP solutions.</li></ul><h4><br/></h4><h4><b>The Impact You Will Have:</b></h4><ul><li>Empowering customers to successfully complete their most challenging SoC design and verification projects.</li><li>Enhancing the quality and reliability of advanced silicon chips used in diverse applications.</li><li>Driving innovation in verification methodologies and processes, setting industry standards.</li><li>Mentoring and growing the verification team’s expertise, ensuring readiness for future assignments.</li><li>Improving collaboration and knowledge sharing across multidisciplinary teams.</li><li>Contributing to Synopsys’ reputation as a trusted partner for high-performance computing, automotive, aerospace &amp; defense, and more.</li><li>Accelerating project timelines and improving customer satisfaction through proactive problem-solving.</li><li>Shaping the future of technology by delivering solutions that power smart devices and connected systems worldwide.</li></ul><h4><br/></h4><h4><b>What You’ll Need:</b></h4><ul><li>B.E/B.Tech/M.E/M.Tech in Electronics or related field, with 8+ years’ hands-on experience in SoC/IP/Subsystems verification.</li><li>Strong expertise in pre-silicon verification methodologies (UVM, Coverage Analysis, Verification plan creation, debugging, etc.).</li><li>Proficiency in verification tools such as VCS, waveform analyzers, and integration of third-party VIPs (including Synopsys VIPs).</li><li>Solid understanding of protocols like PCIe, Ethernet, USB, DDR, and processor/interconnect/debug architectures.</li><li>Demonstrated ability to lead and manage verification teams working on complex SoC/IP/Subsystems projects.</li><li>Experience with planning and managing verification activities, including resource estimation and risk management.</li><li>Strong grasp of design concepts, ASIC flows, and stakeholder interactions.</li><li>Excellent communication and interpersonal skills.</li><li>Preferred: Experience with ARM-based technologies (Coresight Debug, Processor architecture, etc.).</li></ul><h4><br/></h4><h4><b>Who You Are:</b></h4><ul><li>Inclusive and collaborative, welcoming diverse perspectives and fostering a positive team culture.</li><li>Proactive problem-solver with strong analytical skills and attention to detail.</li><li>Effective communicator, able to translate complex technical information for varied audiences.</li><li>A natural leader, skilled at mentoring and developing team members.</li><li>Adaptable and eager to learn, staying ahead of industry trends and new technologies.</li><li>Customer-focused, committed to delivering high-quality solutions and exceeding expectations.</li></ul><h4><br/></h4><h4><b>The Team You’ll Be A Part Of:</b></h4><p>You’ll join the System Solutions Group (SSG), a dynamic and diverse team of verification experts, architects, and designers dedicated to delivering tool, methodology, architecture, and design expertise for leading-edge SoC projects. SSG partners with customers from startups to industry leaders across high-performance computing, automotive, aerospace &amp; defense, and more. Together, we collaborate to solve challenging problems, innovate on verification methodologies, and enable the development of world-class silicon solutions.</p><h4><br/></h4><h4><b>Rewards and Benefits:</b></h4><p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p></h4><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

Synopsys India Pvt Ltd

Senior Test Engineer

<p>IVI BSP Display-Touch-Audio Subsystem Engineer</p><h4>At Visteon, the work we do is both relevant and recognized—not just by our organization, but by our peers, by industry-leading brands, and by millions of drivers around the world. That’s YOUR work.</h4><h4>And, as a truly global technology leader in the mobility space, focused on building cross-functional AND cross-cultural teams, we connect you with people who help you grow.</h4><h4>So here, whatever we do is not a job. It’s a mission. As a multi-billion-dollar leader of disruptive change in the industry, we are shaping the future, while enabling a cleaner environment. No other industry offers more fast-paced change and opportunity. We are in the midst of a mobility revolution that will completely change the way we interact with our vehicles, reduce the number of car accidents and fatalities, and make the world a cleaner place. </h4><h4>Visteon is at the epicenter of this mobility revolution.</h4><h4>Two major trends in the automotive industry – the shift to electric vehicles and vehicles with autonomous safety technologies – have created unique opportunities for Visteon. We are the only automotive provider focused exclusively on cockpit electronics – the fastest-growing segment in the industry.</h4><h4>Detailed description: The mission of this role is to design, develop, test and debug BSP software components to build Display-Touch-Audio Subsystem capabilities in In-Vehicle infotainment systems. <br/>How You Will Spend Your Days <br/>• Review requirement specifications and work along with requirements team to resolve issues in the specification and eventually signoff the specification. <br/>• HSIS review and correction along with hardware team. <br/>• Board bring up activities for Display, Touch, Audio subsystem (Serializer-Deserializer, Platform specific frameworks, GMSL/LVDS / FPD Link, DSI/DP, Touch Firmware, Audio calibration and TDM /PCM/DSP) in Linux, Android and QNX systems. <br/>• Interact with hardware teams for board bring up activities, calibration &amp; certification activities and to root cause hardware level issues. <br/>• Interact with cross-functional teams within Visteon and as well as with external teams like chipset vendors to resolve dependencies during development and fixing issues. <br/>• Perform root cause analysis for the issues observed and resolve issues during development, stability and maintenance phase of the project. <br/>• Create documentations for high level design, detailed design and test plans for the software modules. <br/>• Develop and integrate tools/scripts to automate testing. <br/>• Run development testing and document the test reports. <br/>• Create efficient reports with respect to software development, issues resolution and testing. <br/>Technical Knowledge and Skills <br/>• Bachelor’s degree in engineering or related field in Computer Science or Electronics. <br/>• At least 10 to 12 years of experience in developing BSP software components in Linux and Android platforms. <br/>o Good Knowledge of Linux &amp; QNX device drivers as well as peripheral subsystems. <br/>o Strong in C programming skills. <br/>o Working experience in Android AOSP/Linux based infotainment and build environments <br/>o Development experience in Display, Touch, Audio subsystem drivers (Serializer-Deserializer, Platform specific frameworks, GMSL/LVDS FPD Link, DSI, Touch Firmware, Audio calibration and TDM /PCM/DSP configurations, I2S, A2B). <br/>o Experience on DSI, DP port configurations across various SoC platforms like Qualcomm, Samsung, MediaTek. <br/>o Display bridge chip bring-up/configuration experience. <br/>o DRM, Surface flinger, Openwfd, screen related understanding to debug issues. <br/>o TFT panel display timing configuration and debugging. <br/>o Touch controller firmware update, Driver configuration parsing mechanisms. <br/>o Audio driver usage in different chip vendor’s platform; understanding of audio routing; configurations in terms of OS, SoC platform. <br/>o Development experience in serial protocols like I2C, SPI and UART. <br/>o Working experience in QNX hypervisor-based systems <br/>o Good knowledge and working experience on Qualcomm, MediaTek and Samsung SoC platforms. <br/>o Proficient in handling hardware debugging tools like oscilloscope, saleae analyzer, EVK platforms, JTAG debugger <br/>• Creative &amp; strong problem-solving capability resulting in good solution to technical complex software defects <br/>• Strong communication and inter-personal skills</h4><h4><strong>More Good Reasons to Work for Visteon Focusing on the Future</strong></h4><h4>Our company strategy focuses on leading the evolution of automotive digital cockpits and safety solutions. This strategy is driven by constant innovation, and you will support our efforts through your role. We are recognized across the industry for innovation. We have a strong book of business that is expected to drive future growth, along with a customer base that includes almost every automotive manufacturer in the world.</h4><h4><strong>Company Culture</strong></h4><h4>Working at Visteon is a journey in which our employees can develop their strengths and advance their careers while making a difference globally. Join us and help change the world and how we interact with our vehicles. Visteon is where the best technical talent creates the future. Learn more about our culture <a href="https://www.visteon.com/careers/company-culture/" rel="noopener" target="_blank">here.</a></h4><h4> </h4><h4>About Visteon</h4><h4> </h4><h4>Visteon is a global technology company serving the mobility industry, dedicated to creating a more enjoyable, connected and safe driving experience. The company’s platforms leverage proven, scalable hardware and software solutions that enable the digital, electric, and autonomous evolution of our global automotive customers. Visteon products align with key industry trends and include digital instrument clusters, displays, Android-based infotainment systems, domain controllers, advanced driver assistance systems and battery management systems. The company is headquartered in Van Buren Township, Michigan, and has approximately 10,000 employees at more than 40 facilities in 18 countries. Visteon reported sales of approximately $2.8 billion and booked $5.1 billion of new business in 2021.Learn more at <a href="http://www.visteon.com/" rel="noopener" target="_blank">www.visteon.com</a>.</h4><h4>Follow Us</h4><h4>For more information about our company, technologies and products, follow us on <a href="https://www.linkedin.com/company/visteon" rel="noopener" target="_blank">LinkedIn, </a><a href="https://twitter.com/Visteon" rel="noopener" target="_blank">Twitter,</a> <a href="https://www.facebook.com/VisteonCorporation" rel="noopener" target="_blank">Facebook, </a><a href="https://www.youtube.com/user/Visteon" rel="noopener" target="_blank">YouTube </a>and <a href="https://www.slideshare.net/VisteonCorporation" rel="noopener" target="_blank">Instagram. </a>You can also follow our careers-focused channels on <a href="https://twitter.com/VisteonCareers" rel="noopener" target="_blank">Twitter </a>and <a href="https://www.facebook.com/VisteonCareers" rel="noopener" target="_blank">Facebook </a>to keep up with our latest job postings and the great work our employees are doing.</h4><h4>Experience Level</h4>Senior Level

Visteon

Electronic Engineer

<p>SoC Senior Design and Integration Engineer, Google Cloud</p><h4>Minimum qualifications:</h4><ul><li>Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.</li><li>5 years of experience in ASIC/SoC development with Verilog/SystemVerilog.</li><li>Experience in one or more SoC Integration domains and flows (Clocking or debug or fabrics/NoC or Security or low power methodologies).</li><li>Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).<br/></li></ul><br/><h4>Preferred qualifications:</h4><ul><li>Experience with programming languages (e.g., Python, C/C++ or Perl).</li><li>Experience in SoC designs and integration flows.</li><li>Knowledge of bus architectures, fabrics/NoC or memory hierarchies.</li><li>Knowledge of high performance and low power design techniques.</li></ul><h4>About the job</h4>In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of  Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. <br/><br/>In this role, you will be part of a team developing SoCs used to accelerate machine learning computation in data centers. You will solve technical problems with innovative and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind. You will collaborate with members of architecture, verification, power and performance, physical design etc. to specify and deliver high quality designs for next generation data center accelerators.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.<h4>Responsibilities</h4><ul><li>Own microarchitecture, implementation and Integration of SoC Chassis and subsystems.</li><li>Perform Quality check flows like Lint, CDC, RDC, VCLP.</li><li>Drive design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams.</li><li>Identify and drive Power, Performance and Area improvements for the domains owned.</li></ul><h4>Experience Level</h4>Senior Level

Google India Pvt Ltd

Embedded Systems Engineer

<p>Silicon RTL Design Engineer Networking, Google Cloud</p><h4>Minimum qualifications:</h4><ul><li>Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.</li><li>4 years of experience in ASIC development with Verilog/SystemVerilog, VHDL.</li><li>Experience in micro-architecture and design of IPs and Subsystems.</li><li>Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).</li></ul><br/><h4>Preferred qualifications:</h4><ul><li>Experience in Networking domain like Packet processing, bandwidth management, congestion control etc.</li><li>Experience with scripting languages (e.g., Python or Perl).</li><li>Knowledge of bus architectures, fabrics/NoC, processor design, or memory hierarchies.</li><li>Knowledge of high performance and low power design techniques.<br/><br/></li></ul><h4>About the job</h4><p>In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of  Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.</p><p>In this role, you will develop to accelerate and improve traffic efficiency in data centers. You will collaborate with members of architecture, verification, power and performance, physical design, etc. to specify and deliver quality designs for next generation data center accelerators. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.</p><p>Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.</p><h4>Responsibilities</h4><ul><li>Own microarchitecture and implementation of IPs and subsystems in the Networking domain.</li><li>Work with design team members to close feature definitions and develop microarchitecture specifications. </li><li>Participate in design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams.</li><li>Work on Power, Performance and Area improvements for the domains owned.</li></ul><h4>Experience Level</h4>Mid Level

<p>Senior Engineer - Network modeling (Infowork ICM)</p><h4>Company Description</h4><p><strong>Work with Us. Change the World.</strong></p><p>At AECOM, we're delivering a better world. Whether improving your commute, keeping the lights on, providing access to clean water, or transforming skylines, our work helps people and communities thrive. We are the world's trusted infrastructure consulting firm, partnering with clients to solve the world’s most complex challenges and build legacies for future generations.</p><p>There has never been a better time to be at AECOM. With accelerating infrastructure investment worldwide, our services are in great demand. We invite you to bring your bold ideas and big dreams and become part of a global team of over 50,000 planners, designers, engineers, scientists, digital innovators, program and construction managers and other professionals delivering projects that create a positive and tangible impact around the world.</p><p>We're one global team driven by our common purpose to deliver a better world. Join us.</p><h4>Job Description</h4><ul><li>Contribute to engineering design assignments in a team environment on large-scale project teams.</li><li>Candidate should have minimum 5 years working experience on wastewater modelling for ANZ and UK &amp; I region especially on model calibration &amp; verification.</li><li>Candidate should be well versed with Infoworks ICM hydraulic modelling software.</li><li>Having hands on experience with modeling tools like Water GEMS, SewerGEMS, StormCAD, PCSWMM, HEC-RAS, GeoPak would be advantage.</li><li>Capable for leading the project, coordinating with Lead Office, mentoring juniors and ensuring quality checks.</li><li>Complete design activities to specified standards including earthworks modelling and design, sanitary and storm sewer design, watermain design, grading of roads and drive isles, lot grading, and stormwater management design of ponds and other retention systems.</li></ul><h4>Qualifications</h4><ul><li>Master of Engineering degree (or equivalent education) in an appropriate engineering discipline from an accredited college or university. </li><li>Chartered Engineer (CEng), or Professional Engineer (PE) license or equivalent in the relevant field from any global organization (e.g., Institution of Civil Engineers, UK).</li><li>Highly motivated, hardworking, interpersonal, and enthusiastic team player that is willing to learn and adapt to change.</li><li>US/UK/Canada Experience will be added advantage</li><li>Good communication skills, and ability to work well independently at times.</li><li>Able to see the “bigger picture” and take a birds-eye view of projects</li><li>Confident, with the ability to work either independently or as part of a team.</li><li>Ability to work to deadlines and under pressure.</li><li>Accountability for assigned work.</li><li>Accuracy &amp; precision of work.</li><li>Willingness to learn and develop.</li><li>Excellent written and verbal communication skills</li><li>Strong problem-solving skills</li><li>Enthusiastic and Self-motivated.</li><li>Work well within a multidisciplinary team</li></ul><h4>Additional Information</h4><p>AECOM provides a wide array of compensation and benefits programs to meet the diverse needs of our employees and their families. We also provide a robust global well-being program. We’re the world’s trusted global infrastructure firm, and we’re in this together – your growth and success are ours too.<br/><br/>As an Equal Opportunity Employer, we believe in each person’s potential, and we’ll help you reach yours.</p><p>#LI-FS1</p><p><strong>About AECOM</strong> </p><p>AECOM is proud to offer comprehensive benefits to meet the diverse needs of our employees. Depending on your employment status, AECOM benefits may include medical, dental, vision, life, AD&amp;D, disability benefits, paid time off, leaves of absences, voluntary benefits, perks, flexible work options, well-being resources, employee assistance program, business travel insurance, service recognition awards, retirement savings plan, and employee stock purchase plan. </p><p>AECOM is the global infrastructure leader, committed to delivering a better world. As a trusted professional services firm powered by deep technical abilities, we solve our clients’ complex challenges in water, environment, energy, transportation and buildings. Our teams partner with public- and private-sector clients to create innovative, sustainable and resilient solutions throughout the project lifecycle – from advisory, planning, design and engineering to program and construction management. AECOM is a Fortune 500 firm that had revenue of $16.1 billion in fiscal year 2024. Learn more at aecom.com. </p><p><strong>What makes AECOM a great place to work</strong> </p><p>You will be part of a global team that champions your growth and career ambitions. Work on groundbreaking projects - both in your local community and on a global scale - that are transforming our industry and shaping the future. With cutting-edge technology and a network of experts, you’ll have the resources to make a real impact. Our award-winning training and development programs are designed to expand your technical expertise and leadership skills, helping you build the career you’ve always envisioned. Here, you’ll find a welcoming workplace built on respect, collaboration and community - where you have the freedom to grow in a world of opportunity. </p><p>As an Equal Opportunity Employer, we believe in your potential and are here to help you achieve it. All your information will be kept confidential according to EEO guidelines. </p><h4>Experience Level</h4>Senior Level

Aecom India Pvt Ltd

Senior Network Engineer

<p>Silicon Senior Physical Design Engineer, TPU, Google Cloud</p><h4>Minimum qualifications:</h4><ul><li>Bachelor’s degree in Electrical Engineering or equivalent practical experience.</li><li>5 years of experience with advanced design, including clock/voltage domain crossing, Design for Testing (DFT), and low power designs.</li><li>Experience with System on a Chip (SoC) cycles.</li><li>Experience in high-performance, high-frequency, and low-power designs.</li></ul><br/><h4>Preferred qualifications:</h4><ul><li>Master’s degree in Electrical Engineering.</li><li>Experience in coding with System Verilog and scripting with TCL.</li><li>Experience with VLSI design in SoC or multiple-cycles of SoC in ASIC design.</li><li>Experience with layout verification and design rules.</li></ul><h4>About the job</h4>Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
<p>In this role, you will be part of a team developing SoCs used to accelerate machine learning computation in data centers. You will collaborate with members of architecture, verification, power and performance, physical design etc. to specify and deliver high quality designs for next generation data center accelerators. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.</p><p>The ML, Systems, and Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.</p><p>We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.</p>Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.<h4>Responsibilities</h4><ul><li>Define and drive the implementation of physical design methodologies.</li><li>Take ownership of one or more physical design partitions or top level.</li><li>Manage timing and power consumption of the design.</li><li>Contribute to design methodology, libraries, and code review. 
</li><li>Define the physical design related rule sets for the functional design engineers.</li></ul><h4>Experience Level</h4>Senior Level

Design Engineer

<p>EIS Engineer</p><p><br></p><p><strong>Role Overview</strong></p><p>We’re looking for a skilled EIS Engineer with a strong background in Medical Device Regulations and Control Systems Design &amp; Development (CSI). This is an exciting opportunity to work on end-to-end product development and ensure compliance with international standards.</p><p><br></p><p><strong> Key Responsibilities</strong></p><ul><li>Lead and contribute to control system design and development for medical devices.</li><li>Ensure compliance with regulatory standards like FDA, ISO 13485, IEC 62304, etc.</li><li>Collaborate with cross-functional teams (hardware, software, QA, RA).</li><li>Prepare and maintain technical documentation for audits and approvals.</li><li>Support risk management, verification &amp; validation, and system integration.</li></ul><p><br></p><p><strong> Requirements</strong></p><ul><li>6–8 years of experience in EIS, medical device development, or control systems engineering.</li><li>Strong understanding of control systems (CSI) methodologies and tools (e.g., MATLAB/Simulink, LabVIEW, PLCs).</li><li>In-depth knowledge of medical device regulations and standards.</li><li>Excellent analytical, documentation, and communication skills.</li><li>BE/BTech or higher in Electronics, Instrumentation, Biomedical, or related fields.</li></ul><p><br></p><p>Share your updated resume now.</p>

Teamware Solutions

Technical Operations Associate

<p>RTL Design and Signoff, Principal Engineer</p><h4>
                
                General Information
            </h4>






                                                Job Title
                                            

                                                                                            RTL Design and Signoff, Principal Engineer
                                                                                    



                                                Job ID
                                            

                                                                                            12630
                                                                                    



                                                Country
                                            

                                                                                            India
                                                                                    



                                                City
                                            

                                                                                            Noida
                                                                                    



                                                Date Posted
                                            

                                                                                            26-Aug-2025
                                                                                    



                                                Job Category
                                            

                                                                                            Engineering
                                                                                    



                                                Job Subcategory
                                            

                                                                                            SOC Engineering
                                                                                    



                                                Hire Type
                                            

                                                                                            Employee
                                                                                    



                                                Remote Eligible
                                            

                                                                                            No
                                                                                    






<h4>
                
                Descriptions &amp; Requirements
            </h4>






                                                Job Description and Requirements
                                            

<h4 id="isPasted"><b>We Are:</b><p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p><h4><br/></h4><h4><b>You Are:</b></h4><p>You are a seasoned engineering professional with a passion for tackling complex SoC challenges. With 12+ years' experience, you thrive in dynamic environments and excel at leading multidisciplinary teams through the intricacies of RTL design and signoff. You possess deep expertise in RTL methodologies, static verification, and timing analysis, and you’re driven to deliver robust, high-quality solutions that enable customer success. Your collaborative spirit, strategic mindset, and attention to detail allow you to translate customer requirements into innovative design flows. You stay ahead of technological trends, continuously learning new tools and techniques, and you’re eager to mentor others in best practices for design and verification. You value diversity and inclusion, recognizing that varied perspectives fuel innovation. Your communication skills empower you to bridge gaps across teams, stakeholders, and customers, ensuring alignment and clarity. You take pride in your ability to solve technical problems efficiently, make informed decisions under pressure, and deliver results that exceed expectations. Above all, you are motivated by the opportunity to shape the future of smart technologies and contribute to projects that impact industries worldwide.</p><h4><br/></h4><h4><b>What You’ll Be Doing:</b></h4><ul><li>Partnering with Synopsys customers to define RTL signoff and design scopes, ensuring alignment with project objectives.</li><li>Analyzing design complexity and requirements to propose optimal resource allocation for successful project delivery.</li><li>Leading engineering teams in executing pre-silicon static verification activities on IPs and subsystems.</li><li>Developing and refining timing constraints for synthesis and timing, based on design architecture and requirements.</li><li>Collaborating with peers to enhance methodologies, driving improvements in execution efficiency and project quality.</li><li>Adopting and mastering new RTL design and static verification tools/methodologies using Synopsys products for customer enablement.</li><li>Working cross-functionally with Business Unit Application Engineers and Sales to broaden and deploy tool and IP solutions.</li><li>Establishing robust flows and methodologies to enable rapid setup for RTL quality checks, synthesis, and formality.</li><li>Training team members on advanced design concepts and root-cause analysis to foster continuous learning and growth.</li></ul><h4><br/></h4><h4><b>The Impact You Will Have:</b></h4><ul><li>Accelerating customer success by delivering reliable RTL design and signoff solutions for challenging SoC projects.</li><li>Enabling startups, commercial enterprises, and government agencies to achieve first-time-right silicon implementations.</li><li>Driving adoption of innovative Synopsys technologies and methodologies across diverse customer segments.</li><li>Enhancing team capabilities through mentorship and knowledge sharing, fostering a culture of technical excellence.</li><li>Improving project delivery timelines and quality by optimizing verification flows and resource utilization.</li><li>Contributing to the evolution of industry-leading chip design practices and standards.</li><li>Strengthening Synopsys’ reputation as a trusted partner for cutting-edge semiconductor solutions.</li></ul><h4><br/></h4><h4><b>What You’ll Need:</b></h4><ul><li>B.E/B. Tech/M.E/M. Tech in electronics or a related field.</li><li>Minimum of 12+ years’ experience in RTL design and verification, with a proven track record of technical leadership.</li><li>Expertise in LINT, CDC, RDC checks, and static verification methodologies.</li><li>Strong background in setting up flows and deploying RTL signoff tools for rapid project initiation.</li><li>Advanced skills in debugging, diagnosing violations, and resolving complex design issues.</li><li>Proficiency in developing and validating timing constraints; experience with preliminary synthesis and area estimation.</li><li>Demonstrated ability to lead teams through the RTL signoff process for complex SoC/IP/subsystems.</li><li>Experience with project planning and activity management in RTL signoff and design.</li><li>Solid understanding of ASIC design concepts, flows, and stakeholder requirements.</li><li>Excellent verbal and written communication skills to facilitate collaboration and customer engagement.</li></ul><h4><br/></h4><h4><b>Who You Are:</b></h4><ul><li>Analytical and detail-oriented, with a proactive approach to problem solving.</li><li>Collaborative leader and mentor, able to inspire and guide teams to success.</li><li>Adaptable and resilient, thriving in fast-paced, evolving environments.</li><li>Innovative thinker, constantly seeking opportunities for process improvement and technological advancement.</li><li>Effective communicator, capable of translating complex concepts for diverse audiences.</li><li>Committed to fostering an inclusive, respectful, and supportive workplace culture.</li></ul><h4><br/></h4><h4><b>The Team You’ll Be A Part Of:</b></h4><p>You’ll join the System Solutions Group (SSG), a global team of experts dedicated to delivering architecture, design, verification, and implementation solutions for the world’s most challenging SoC projects. SSG partners closely with customers ranging from startups to industry leaders, leveraging Synopsys’ advanced technologies to enable successful chip development from sub-blocks to full turnkey solutions. Collaboration, innovation, and technical excellence define our team culture.</p><h4><br/></h4><h4><b>Rewards and Benefits:</b></h4><p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p></h4><p><span id="isPasted">At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</span></p><h4>Experience Level</h4>Senior Level

<p>Silicon Design Verification Manager II, Camera ISP</p><h4>Minimum qualifications:</h4><ul><li>Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.<br/></li><li>10 years of experience with Camera ISP image processing or other multimedia IPs such as Display or Video Codec.</li><li>10 years of experience with System Verilog Assertions (SVA), assertion-based verification, and formal verification.</li><li>4 years of experience in people management, developing employees.<br/></li></ul><br/><h4>Preferred qualifications:</h4><ul><li>Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.<br/></li><li>Experience in low-power design verification.<br/></li><li>Experience working with RTL design and integration teams on methodologies that improve team productivity and velocity.</li><li>Experience working with software teams to define hardware/software interfacing including control/status registers, security, and error handling.</li></ul><h4>About the job</h4><p>Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.</p><p>Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.</p><h4>Responsibilities</h4><ul><li>Lead a team of individuals; set and communicate individual and team priorities that support organizational goals. Meet regularly with individuals to discuss performance and development, and provide feedback and coaching.<br/></li><li>Work cross-functionally to debug failures and verify the functional correctness of the design.<br/></li><li>Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use.<br/></li><li>Plan the verification of complex Camera ISP hardware IPs at subsystem and full chip level by fully understanding the design specification and interacting with architecture and design engineers to identify important verification scenarios.</li><li>Create and enhance constrained-random verification environments using System Verilog and UVM.</li></ul><h4>Experience Level</h4>Senior Level

QA Test Engineer

<p>Member Of Technical Staff, DFM Firmware Engineer</p><p>We’re in an unbelievably exciting area of tech and are fundamentally reshaping the data storage industry. Here, you lead with innovative thinking, grow along with us, and join the smartest team in the industry.</p><p>This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us.</p><p><strong>SHOULD YOU ACCEPT THIS CHALLENGE...</strong></p><p>The DFM Firmware Team plays a crucial role in designing and developing the Direct Flash Module (DFM) – a key module of Pure's Flasharray and Flashblade enterprise storage solutions. The DFM is an internally designed enterprise storage device using the NAND flash technology. Compared with the off-the-shelf SSD, the DFM has the competitive advantage of  simplicity, high performance, low cost and scalability.</p><p>As a member of the DFM firmware team, you'll have rare opportunities to work across various domains, including the entire data path, NAND media management, and low-level hardware interfaces. Our firmware design enables us to quickly integrate the latest NAND technologies from various vendors. We were pioneers in adopting QLC for enterprise storage solutions, releasing the first QLC DFM in 2019. Our proprietary media management policies and algorithms position Pure as a leader in enabling QLC NAND in the enterprise storage industry.</p><p>You'll work closely with the Purity software, hardware, NAND, and drive qualification teams. This offers a unique opportunity to learn the latest technologies, including the newest generations of NAND, NVMe/PCIe, as well as SSD controllers. Firmware development opens doors to experiences in embedded software design, hardware and system integration. You'll develop a comprehensive understanding and gain insights into the entire product development and release process.</p><p><strong>What You Will Be Doing</strong></p><p>Pure Storage is seeking a full-time Firmware Engineer to join our device firmware team. You will be working as part of a small, but fast growing, dynamic team and will be responsible for:</p><ul><li>Designing firmware simulation environment, investigating and debugging issues, and developing failure analysis tools and process</li><li>Designing, implementing, and testing firmware of Pure Storage’s DirectFlash™ SSD Modules</li><li>Coding and testing in C/C++ and Python</li><li>Bringing up and enabling new hardware components including latest NAND and developing low level firmware features</li><li>Internal development automation including continuous integration, automated unit and regression testing, etc</li><li>Working closely with hardware, system software and manufacturing teams</li></ul><p><strong>What You Bring to the Team</strong></p><ul><li>BS in Computer Science or equivalent</li><li>Strong experience with NAND, Flash, and/or SSD Device Firmware Development</li><li>Strong understanding of software/firmware test and release processes</li><li>Experience using Python, C/C++  or related programming languages, hands on experience in developing the SI</li><li>Familiar with embedded software or firmware development</li><li>Experience with Micro-controllers, SoC, or hardware bring-up</li><li>Good verbal communication &amp; collaboration skill.</li><li>Must be willing and able to work in an open office, team environment.</li><li>We are primarily an in-office environment and therefore, you will be expected to work from the Banglaore office in compliance with Pure’s policies, unless you are on PTO, or work travel, or other approved leave.</li></ul><p><strong>WHAT YOU CAN EXPECT FROM US:</strong></p><ul><li><strong>Pure Innovation</strong>: We celebrate those who think critically, like a challenge and aspire to be trailblazers.</li><li><strong>Pure Growth</strong>: We give you the space and support to grow along with us and to contribute to something meaningful. We have been Named Fortune's Best Large Workplaces in the Bay Area™, Fortune's Best Workplaces for Millennials™ and certified as a Great Place to Work®!</li><li><strong>Pure Team</strong>: We build each other up and set aside ego for the greater good.</li></ul><p>And because we understand the value of bringing your full and best self to work, we offer a variety of perks to manage a healthy balance, including flexible time off, wellness resources and company-sponsored team events. Check out <a href="http://purebenefits.com">purebenefits.com</a> for more information.</p><p><strong>ACCOMMODATIONS AND ACCESSIBILITY:</strong></p><p>Candidates with disabilities may request accommodations for all aspects of our hiring process. For more on this, contact us at <a href="mailto:TA-Ops@purestorage.com">TA-Ops@purestorage.com</a> if you’re invited to an interview.</p><p><strong>OUR COMMITMENT TO A STRONG AND INCLUSIVE TEAM:</strong></p><p>We’re forging a future where everyone finds their rightful place and where every voice matters. Where uniqueness isn’t just accepted but embraced. That’s why we are committed to fostering the growth and development of every person, cultivating a sense of community through our Employee Resource Groups and advocating for inclusive leadership.<br/><br/>Pure is proud to be an equal opportunity and affirmative action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or any other characteristic legally protected by the laws of the jurisdiction in which you are being considered for hire.</p><h4>Experience Level</h4>Senior Level

Pure Storage India Pvt Ltd

<p>Memory Layout Engineer</p><p><br></p><p>7Rays Semiconductors India Private Limited is seeking experienced Memory Layout Engineer with over 5 years of experience.&nbsp;</p><p>The job opportunity is based in Bangalore with a 30-day notice period.</p><p><br></p><p>If you are interested in this role, please share your resume or references with deepti.negi@7rayssemi.com.</p>

7Rays Semiconductors

Computer Engineer

<p>Engineering Manager</p><p><br></p><p><strong>Technical Skills</strong> :&nbsp;Backend: Java8, SpringBoot, RESTful Services, Messaging system integrations, Mockito for unit testing</p><p><strong>Frontend:</strong> ReactJS or Angular</p><p><strong>Database</strong>: MySQL or any relational database</p><p><strong>Cloud</strong>: AWS or any cloud</p><h3><br></h3><p><strong>Job Description :</strong></p><ul><li>Candidate should have 10+ years of real-time project experience managing a team of at least 10 developers</li><li>Should work with the Engineering Leadership team and promote the development of clean and well-crafted code.</li><li>Should manage 2 or more Scrum teams</li><li>Should work and collaborate directly with Client Solution Architects and contribute in decision making</li><li>Should coach and mentor the Technical Leads and other developers on the team</li><li>Identifies and promotes productivity improvement through tools and process changes</li><li>Responsible for the team’s overall delivery quality and commitment</li><li>Good in communication and conduct status reporting with the Client leadership</li></ul>

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