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Associate Electronics RF Design and Analysis EngineerAssociate Electronics RF Design and Analysis EngineerCompany:Boeing India Private LimitedOverview As a leading global aerospace company, Boeing develops, manufactures and services commercial airplanes, defense products and space systems for customers in more than 150 countries. As a top U.S. exporter, the company leverages the talents of a global supplier base to advance economic opportunity, sustainability and community impact. Boeing’s team is committed to innovating for the future, leading with sustainability, and cultivating a culture based on the company’s core values of safety, quality and integrity. Technology for today and tomorrowThe Boeing India Engineering &amp; Technology Center (BIETC) is a 5500+ engineering workforce that contributes to global aerospace growth. Our engineers deliver cutting-edge R&amp;D, innovation, and high-quality engineering work in global markets, and leverage new-age technologies such as AI/ML, IIoT, Cloud, Model-Based Engineering, and Additive Manufacturing, shaping the future of aerospace. People-driven cultureAt Boeing, we believe creativity and innovation thrives when every employee is trusted, empowered, and has the flexibility to choose, grow, learn, and explore. We offer variable arrangements depending upon business and customer needs, and professional pursuits that offer greater flexibility in the way our people work. We also believe that collaboration, frequent team engagements, and face-to-face meetings bring together different perspectives and thoughts – enabling every voice to be heard and every perspective to be respected.  No matter where or how our teammates work, we are committed to positively shaping people’s careers and being thoughtful about employee wellbeing.With us, you can create and contribute to what matters most in your career, community, country, and world. Join us in powering the progress of global aerospace. Position Overview Boeing India Engineering has an immediate opening for an Associate Electronics RF Design and Analysis Engineer to work in areas of RF design. This position offers a unique opportunity to work complex technical challenges in support of safety operation and return to service. This role will be based out of Bangalore, India. Position Responsibilities:<ul><li>Responsible for RF and mixed signal designs.</li><li>Design and simulate RF circuits for cellular modules including LNAs, filters, Diplexers, switching and matching networks.</li><li>Perform testing and validation of RF components and systems - RF amplifiers, filters, and antennas - to validate performance against specifications.</li><li>Perform RF validation, tuning, and debugging using tools such as VNA, spectrum analyzers, and signal generators</li><li>Perform simulation of filters and antenna synthesis using tools like Ansys HFSS</li><li>Perform circuit design, requirements and interface definition and design verification.</li><li>Design to meet EMI/EMC, safety and environmental compliance.</li><li>Develop and optimize RF systems supporting Wifi,4G LTE and 5G.</li><li>Execute testing of designs in Labs for functional, performance and stress environments apart from system integration  </li></ul>Basic Qualifications (Required Skills and Experience)<ul><li>Bachelor’s or Master’s Degree is required as a basic qualification in Electronics and Communication Engineering with 4 to 8 years of relevant experience. </li></ul>Preferred Qualifications (Desired Skills/Experience):<ul><li>Candidate should have experience in RF Design integration capabilities for Wireless communications and 5G integration</li><li>Candidate should have strong experience in high-speed design clocking, Ethernet/Serdes/MIPI designs</li><li>Candidate should have strong experience in knowledge of using simulation tools like SABER RD and creating simulation models with MATLAB and SABER</li><li>Candidate should have experience with Power Integrity analysis, Hyperlynx SI and Mentor suite of eCAD tools</li><li>Candidate should have basic knowledge of cellular and Wi-Fi standards</li></ul>Relocation:<ul><li>This position does offer relocation within INDIA.</li></ul>Language Requirements:Not ApplicableEducation:Bachelor's Degree or EquivalentRelocation:This position offers relocation based on candidate eligibility.Security Clearance:This position does not require a Security Clearance.Visa Sponsorship:Employer will not sponsor applicants for employment visa status.Contingent Upon Award ProgramThis position is not contingent upon program awardShift:Not a Shift Worker (India)<h4>Experience Level</h4>Mid Level

Boeing India Pvt Ltd

Electronic Engineer

MBD + M-Scripting Engineer We’re Hiring: MBD + M-Scripting EngineerNotice period: Immediate to max 30 daysExperience: 3 – 6 Years We’re looking for MBD + M-Scripting Engineers with experience in any of the following:<ul><li>Design and development of interactive tools using MATLAB App Designer</li><li>Translating functional requirements into structured MATLAB applications and test cases</li><li>Integration of dynamic tables, charts, and plots into MATLAB GUIs</li><li>Regression testing across software releases</li><li>Workflow optimization and automation for performance enhancement</li><li>Hands-on experience in MATLAB development and M-scripting</li><li>Working knowledge of Python and/or C/C++</li><li>Strong problem-solving and debugging skills</li></ul> If interested, share your updated CV.

Capgemini

Design Engineer

GPU Design Verification Engineer<h4>Minimum qualifications:</h4><ul><li>Bachelor's degree in Mechanical Engineering, Electrical Engineering, Industrial Engineering or equivalent practical experience.</li><li>3 years of experience with standard GPU workloads like Manhattan/3DMark.</li><li>Experience with GPU architecture and AMBA Bus protocols like AHB/AXI/ACE.</li></ul> <h4>Preferred qualifications:</h4><ul><li>Master's degree or PhD in Electrical Engineering or Computer Science, or a related field.</li><li>Experience with performance verification of ASICs and Application-Specific Integrated Circuit (ASIC) components.</li><li>Experience with verification of low power techniques.</li></ul><h4>About the job</h4>Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.<h4>Responsibilities</h4><ul><li>Be part of a team to verify digital design blocks (e.g., CPU, Graphics Processing Unit (GPU), Image processor) by understanding the design specification and interacting with design engineers to identify important verification scenarios.</li><li>Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.</li><li>Identify and write all types of coverage measures for stimulus and corner-cases.</li><li>Debug tests with design engineers to deliver functionally correct design blocks.</li><li>Close coverage measures to identify verification holes and to show progress towards tape-out.</li></ul><h4>Experience Level</h4>Mid Level

Google India Pvt Ltd

Testing Engineer

Principal SoC Verification Engineer<h4>
 
 General Information
 </h4>






 Job Title
 

 Principal SoC Verification Engineer
 



 Job ID
 

 12625
 



 Country
 

 India
 



 City
 

 Noida
 



 Date Posted
 

 26-Aug-2025
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 SOC Engineering
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

<h4 id="isPasted">We Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.We are at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we are powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation and SoC Design, we want to meet you.<h4> </h4><h4>You Are:</h4>You are a seasoned engineering professional with 12+ years of hands-on experience in SoC/IP/Subsystems verification, eager to make an impact at the principal level. You thrive in complex technical environments, bringing deep expertise in pre-silicon verification methodologies such as UVM, coverage analysis, and debugging. Your background in electronics engineering is complemented by a robust understanding of ASIC flows, design concepts, and industry protocols including PCIe, Ethernet, USB, and DDR.Leadership comes naturally to you—you guide and mentor teams, fostering growth and excellence, and you’re adept at managing verification activities for large-scale projects. You are a strategic thinker who anticipates challenges and proactively develops risk mitigation plans. Collaboration energizes you, whether working with architects, designers, or cross-functional teams to deliver high-quality solutions. Your communication skills are strong, allowing you to articulate complex technical details clearly to stakeholders and management.You are committed to continuous learning and growth, staying current with new verification tools and Synopsys technologies. Experience with ARM-based technologies, processor architecture, and debug systems further strengthens your profile. Above all, you are passionate about driving innovations in the semiconductor space and excited to help shape the future of smart systems through your expertise and leadership.<h4> </h4><h4>What You’ll Be Doing:</h4><ul><li>Engage with Synopsys customers to understand verification needs and define project scopes and deliverables.</li><li>Lead and mentor a team of engineers to execute pre-silicon verification activities on complex IPs and subsystems.</li><li>Develop verification plans, resource requirements, and risk mitigation strategies to ensure successful project execution.</li><li>Review results and reports, providing continuous feedback to enhance quality and efficiency.</li><li>Report status to management, offering insights and solutions for potential project challenges.</li><li>Collaborate with architects, designers, and pre/post-silicon teams to achieve verification goals.</li><li>Ramp-up on new verification tools and methodologies, leveraging Synopsys Products to enable customer success.</li><li>Work with business unit application engineers and sales teams to develop and deploy tool and IP solutions.</li><li>Drive improvements in verification methodology and execution efficiency across projects.</li><li>Ensure strict adherence to quality standards and best practices in design verification.</li></ul><h4> </h4><h4>The Impact You Will Have:</h4><ul><li>Accelerate customers’ SoC design cycles by delivering high-quality verification solutions.</li><li>Enhance Synopsys’ reputation as a trusted partner in solving complex verification challenges.</li><li>Enable successful product launches for customers in high-performance computing, automotive, aerospace &amp; defense, and more.</li><li>Drive innovation in verification methodologies, contributing to Synopsys’ leadership in EDA tools and IP.</li><li>Mentor and grow the capabilities of the verification team, fostering a culture of excellence and learning.</li><li>Improve project efficiency and execution through effective risk management and proactive problem-solving.</li><li>Strengthen cross-functional collaboration, ensuring seamless integration across design and verification teams.</li><li>Elevate the quality of deliverables, reducing post-silicon issues and increasing customer satisfaction.</li></ul><h4> </h4><h4>What You’ll Need:</h4><ul><li>B.E/B. Tech/M.E/M. Tech in electronics or related field, with a minimum of 12+ years’ experience in SoC/IP/Subsystems verification.</li><li>Expertise in pre-silicon verification: UVM, coverage analysis, verification plan creation, debugging, etc.</li><li>Strong knowledge of industry protocols (PCIe, Ethernet, USB, DDR) and processor/interconnect/debug architectures.</li><li>Hands-on experience with verification tools such as VCS, waveform analyzers, and third-party VIP integration (e.g., Synopsys VIPs).</li><li>Proven ability to lead teams and manage verification activities for complex SoC/IP/Subsystems projects.</li><li>Experience with ARM-based technologies (Coresight Debug, Processor architecture, etc.) is preferred.</li><li>Solid understanding of design concepts, ASIC flows, and stakeholder management.</li></ul><h4> </h4><h4>Who You Are:</h4><ul><li>Inspirational leader with a passion for mentoring and developing engineering talent.</li><li>Excellent communicator, able to articulate technical concepts to diverse audiences.</li><li>Proactive problem solver with strong organizational and analytical skills.</li><li>Collaborative team player, comfortable working in cross-functional and multicultural environments.</li><li>Detail-oriented and quality-focused, committed to delivering best-in-class solutions.</li><li>Adaptable and eager to learn new technologies, tools, and methodologies.</li></ul><h4> </h4><h4>The Team You’ll Be A Part Of:</h4>You’ll join the System Solutions Group (SSG), a dynamic team of experts delivering tool, methodology, architecture, design creation, verification, and physical implementation solutions for leading-edge customers. Our projects span from sub-blocks to full turnkey end-to-end SoCs, supporting startups, industry leaders, commercial entities, and government agencies. The team is dedicated to enabling customers to complete their most challenging SoC design projects in high-performance computing, automotive, aerospace, defense, and beyond.<h4> </h4><h4>Rewards and Benefits:</h4>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</h4>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.<h4>Experience Level</h4>Senior Level

Synopsys India Pvt Ltd

Embedded Systems Engineer

Senior Associate - Remote WindTech EngineerSenior Associate - Remote WindTech Engineer-ANA018630Ready to build the future with AI?  At Genpact, we don’t just keep up with technology—we set the pace. AI and digital innovation are redefining industries, and we’re leading the charge. Genpact’s AI Gigafactory, our industry-first accelerator, is an example of how we’re scaling advanced technology solutions to help global enterprises work smarter, grow faster, and transform at scale. From large-scale models to agentic AI, our breakthrough solutions tackle companies’ most complex challenges.If you thrive in a fast-moving, innovation-driven environment, love building and deploying cutting-edge AI solutions, and want to push the boundaries of what’s possible, this is your moment.Genpact (NYSE: G) is an advanced technology services and solutions company that delivers lasting value for leading enterprises globally. Through our deep business knowledge, operational excellence, and cutting-edge solutions – we help companies across industries get ahead and stay ahead. Powered by curiosity, courage, and innovation, our teams implement data, technology, and AI to create tomorrow, today. Get to know us at genpact.com and on LinkedIn, X, YouTube, and Facebook.Inviting applications for the role of a Senior Associate, Remote WindTech Engineer The ideal candidate will have an excellent balance of people, organizational, and technical skills, the role requires understanding of engineering drawings, service parts, spare parts, vibration analysis including prior knowledge of resolving electrical, mechanical, and hydraulic malfunctions. Previous experience in Inspecting, diagnosing, adjust, or repair of offshore wind turbines will be added advantage. The applicant should be willing to remotely work on heavy industrial machines across the globe which are generating millions of records and run 24X7. Responsibilities 1.    Case Management o    Monitor the 1st tier product support queue in ServiceNow and claim any unassigned cases that is in the queue o    Understand the need (s) of the case creator from a technical and admiration standpoint where the requestor need assistance / information o    Write the technical documentation to provide resolution / information to the requestor and resolve the case in ServiceNow o    Triage the case to concerned technical team if case requires additional inputs from other support team o    Manage the overall case Touch Time, Turn Around Time and closure of the case that is assigned.  Type of cases to be managed•    Updating data related to field contacts of wind farms in e-SCADA platform •    Correcting life census of wind turbines by connecting remote desktop of particular windfarm •    Creating and distributing special instructions developed by product engineering team to the field team and customers •    Creating and distributing daily and weekly wind farm health report by analyzing the data available on ServiceNow  •    End of warranty replacement / repair claims management by identifying the issues raised by customer and assigning the case to the correct technical group for resolution 2.    Technical Supporto    Monitor the 2nd tier product support queue in ServiceNow and claim any unassigned cases that is in the queue o    Understand the need (s) of the case creator from a technical standpoint where the requestor need technical product related assistance / information o    Write the technical documentation to provide resolution / information to the requestor and resolve the case in ServiceNow o    Triage the case to concerned technical team if case requires additional inputs from other support team o    Manage the overall case Touch Time, Turn Around Time and closure of the case that is assigned.  Type of cases to be managed•    Perform oil analysis by reviewing the oil sample reports with the plm document •    Gearbox torque arm pin displacement analysis by reviewing the data sheets received from the wind farms •    End Of Warranty analysis of  •    Correcting life census of wind turbines by connecting remote desktop of particular windfarm •    Reviewing the elastomer damper images to analyze the wear and tear on the component •    Listening the audio clip to analyze the damage on main rotor bearings •    Reviewing the cable images to identify damage category and estimating the remaining life cycle of the cables •    Reviewing the blade images to identify damage category and estimating the remaining life cycle of the cables •    Review the engineering drawing of the components to identify the part number and its quantity and specifications •    Study the lab report of oil to find out the contamination of iron available in main bearing oil lubricant 3.    Remote Monitoring of Vibration in Wind Turbineo    Monitor the 3rd tier product support queue in web based portal where events and anomalies from the wind turbines are triggered o    Write the technical recommendation to field engineers to perform inspection &amp; troubleshooting  to find root cause for events and anomalies to eliminate any downtime for the wind turbinesType of events and anomalies to be managed•    Data analysis to identify faults, determine severity, and write detailed reports on your findings •    Diagnose anomalies related to sensor location on the wind turbines generating faulty data •    Analyze and diagnose events related to sensor circuit values on the wind turbines generating faulty data  •    Analyze and diagnose events related to RPM and power generation on rated wind turbine data •    Resolve data quality issues of the wind farm to show correct number of wind turbines communicating to the wind server •    Vibration analysis on wind turbine components (main rotor bearing, gearbox and generator) by looking at trends, time wave form, spectrum and modes •    Configuration checks on newly added wind farms to ensure data processing to back-office tools •    Validate wind turbine performance after onsite troubleshooting by field engineer by looking at trends, time wave form, spectrum and modes and close the service eventQualifications Minimum qualifications •    B.E / B.Tech – Mechanical Engineering Technical Skills •    Proven experience, including certification of ISO Category I or equivalent, with machinery vibration analysis. •    Experience working with other predictive maintenance technologies and practices.Key competencies •    Strong communication skills; skilled at cross-functional and cross-organizational communication •    Attention to detail and good articulation skills. •    Ability to traverse both vertically and horizontally in a large organizationWhy join Genpact?  • Lead AI-first transformation – Build and scale AI solutions that redefine industries  • Make an impact – Drive change for global enterprises and solve business challenges that matter  • Accelerate your career—Gain hands-on experience, world-class training, mentorship, and AI certifications to advance your skills  • Grow with the best – Learn from top engineers, data scientists, and AI experts in a dynamic, fast-moving workplace  • Committed to ethical AI – Work in an environment where governance, transparency, and security are at the core of everything we  build  • Thrive in a values-driven culture – Our courage, curiosity, and incisiveness - built on a foundation of integrity and inclusion - allow your ideas to fuel progress  Come join the 140,000+ coders, tech shapers, and growth makers at Genpact and take your career in the only direction that matters: Up.  Let’s build tomorrow together.Genpact is an Equal Opportunity Employer and considers applicants for all positions without regard to race, color, religion or belief, sex, age, national origin, citizenship status, marital status, military/veteran status, genetic information, sexual orientation, gender identity, physical or mental disability or any other characteristic protected by applicable laws. Genpact is committed to creating a dynamic work environment that values respect and integrity, customer focus, and innovation. Furthermore, please do note that Genpact does not charge fees to process job applications and applicants are not required to pay to participate in our hiring process in any other way. Examples of such scams include purchasing a 'starter kit,' paying to apply, or purchasing equipment or training.  <h4 xmlns:ftl="http://www.taleo.net/ftl" xmlns:htm="http://www.w3.org/1999/xhtml" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">Job</h4> Senior Associate<h4 xmlns:ftl="http://www.taleo.net/ftl" xmlns:htm="http://www.w3.org/1999/xhtml" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">Primary Location</h4> India-Bangalore<h4 xmlns:ftl="http://www.taleo.net/ftl" xmlns:htm="http://www.w3.org/1999/xhtml" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">Schedule</h4> Full-time<h4 xmlns:ftl="http://www.taleo.net/ftl" xmlns:htm="http://www.w3.org/1999/xhtml" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">Education Level</h4> Bachelor's / Graduation / Equivalent<h4 xmlns:ftl="http://www.taleo.net/ftl" xmlns:htm="http://www.w3.org/1999/xhtml" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">Job Posting</h4> Sep 9, 2025, 1:12:22 PM<h4 xmlns:ftl="http://www.taleo.net/ftl" xmlns:htm="http://www.w3.org/1999/xhtml" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">Unposting Date</h4> OngoingMaster Skills List OperationsJob Category Full Time<h4>Experience Level</h4>Mid Level

Genpact

HVAC Engineer

Senior Silicon EngineerMicrosoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate, high-energy engineers to help achieve that mission.  Are you seeking an opportunity to work on delivering silicon solutions that have a planet-scale impact? The Data Processing Unit (DPU) team within the Azure Hardware Systems &amp; Infrastructure group is seeking a Senior Silicon Silicon Engineer for ASIC verification. You will join our front-end silicon team and be responsible for delivering cutting-edge, high performance, low power, scalable and programmable DPU silicon.  As a Silicon Engineer - ASIC verification  in the Data Processing Unit team you will be validating silicon to solve complex problems in a datacenter. You will interact with the architecture team to develop a programmable silicon implementation. This position is expected to be highly visible and impactful. The vast breadth of domains required to build our DPU silicon gives the perfect opportunity to experience different areas of expertise. The depth required to solve complex engineering problems utilizes your experience and provides you with the perfect platform to shine and grow to the next stage in your career.
<h4>Responsibilities</h4><ul><li>As a Silicon Engineer in the Data Processing Unit team you will be validating silicon to solve complex problems in a datacenter.</li><li>Lead key components of functional validation of complex ASIC SOC  using UVM/C test bench</li><li>Perform Pre-Silicon SoC verification, Post-Silicon/FPGA validation by defining testing strategies</li><li>Work with Cross functional teams, Architecture, Design, Verification, Partner teams for project execution and also influence next generation designs</li><li>Develop Test plan, C tests and infrastructure to complete functional validation of complex design and report bug/issues</li><li>Running tests, debugging failures, creating stress and performance scenarios to meet test plan goals</li><li>Actively participate in chip bring up and write test firmware to support various teams</li><li>Innovate to improve validation efficiency through methodologies and tools</li><li>Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity &amp; Inclusion</li></ul><h4>Qualifications</h4><ul><li>3+ years of related technical engineering experience</li><ul><li>OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience</li><li>OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 2+ years technical engineering experience or internship experience</li><li>OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.</li></ul><li>3+ years of experience in pre-silicon  validation with a proven track record of delivering high performance Network switches/accelarators, Central Processing Unit (CPU), Vector processors and Graphics Processing Unit (GPU’s) or relevant experience.</li><li>Experience in UVM/C verification methodology</li></ul>Other QualificationsAbility to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. Preferred Qualifications <ul><li>Proven track record with the definition and development of complex SoCs. In depth understanding of processors and peripheral interconnect bus protocols and architectures </li></ul>  Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances.  We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the <a href="https://careers.microsoft.com/us/en/accommodationrequest" rel="noopener" target="_blank">Accommodation request form</a>. Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.<h4>Experience Level</h4>Senior Level

Microsoft Corporation India Pvt Ltd.

Principle R&D Software Engineer - Simulation<h4>
 
 General Information
 </h4>






 Job Title
 

 Principle R&amp;D Software Engineer - Simulation
 



 Job ID
 

 12507
 



 Country
 

 India
 



 City
 

 Bengaluru
 



 Date Posted
 

 08-Aug-2025
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 R&amp;D Engineering
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

We Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.You Are:You are a seasoned engineer with a passion for pushing the boundaries of technology. With 6 - 15 years of experience, you bring a wealth of knowledge in software architecture. You excel in C/C++ software development, digital simulation, compiler optimizations and your strong background in design patterns, data structures, and algorithms sets you apart. Your expertise in Verilog, SystemVerilog, coupled with your experience in Unix/Linux platforms, makes you a valuable asset. You are well-versed in developer tools like gdb and Valgrind. Your analytical and problem-solving skills are top-notch, and you are always eager to learn and explore new technologies. As a highly enthusiastic and energetic team player, you are ready to go the extra mile to achieve success.What You’ll Be Doing:- Designing, developing, and troubleshooting core algorithms for compiler. - Collaborating with local and global teams to enhance runtime performance for verilog compiler. - Engaging in pure technical roles focused on software development and architecture. - Utilizing your knowledge of digital simulation flows and EDA tools to drive innovation. - Leveraging your expertise in Verilog, SystemVerilog, and VHDL to develop cutting-edge solutions.The Impact You Will Have:- Driving technological innovation in chip design and verification. - Enhancing the performance and quality of simulation tools used globally. - Solving complex compiler optimizations problems to improve simulation performance. - Collaborating with cross-functional teams to achieve project milestones. - Pioneering new software architectures that set industry standards.What You’ll Need:- Strong hands-on experience in C/C++ based software development. - Deep understanding of design patterns, data structures, algorithms, and programming concepts. - Knowledge of ASIC design flow and EDA tools and methodologies. - Proficiency in Verilog, SystemVerilog, and VHDL HDL.Who You Are:- Highly enthusiastic and energetic team player with excellent communication skills. - Strong desire to learn and explore new technologies. - Effective problem-solver with a keen analytical mind. - Experienced in working on Unix/Linux platforms. - Adept at using developer tools such as gdb and Valgrind.The Team You’ll Be A Part Of:You will be part of the performance team in Digital Simulation. You will work closely with both local and global teams to drive technological advancements and achieve project goals.Rewards and Benefits:We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Senior Software Engineer

Principal Engineer - Rail E&P<h4>Company Description</h4>AECOM’s Enterprise Capabilities team is looking for a Principal Engineer to join our team in Bangalore /Gurgaon office .About Enterprise Capabilities Fundamental to our Think and Act Globally strategy and digital adoption, Enterprise Capabilities (EC) is AECOM’s primary vehicle for workshare. Operating across geographic boundaries and time-zones, EC partners with regional and Global Business Line project teams to provide technical expertise, accelerate delivery and keep AECOM competitive in the industry. With a team of over 3000 technical professionals located across nine countries and remote technical anchors, EC teams are trusted to deliver high-quality, specialist services that help to fill capability gaps, resourcing needs and technical constraints on projects of all scopes and sizes.  Start here. Grow here.<h4>Job Description</h4><ul><li>Performs specific and moderate portions of a broader assignment of an experienced engineer.</li><li>Gathers and correlates basic engineering data using established and well-defined procedures.</li><li>Works on detailed or routine engineering assignments involving calculations and relatively simple tests.</li><li>Proposes approach to solve new problems encountered using modifications of standard procedures or methods developed in previous assignments.</li><li>Identifies discrepancies in results.</li><li>Provides guidance to entry level engineers.</li><li>Performs work in accordance with agreed upon budget and schedule with little supervision.</li><li>Independently performs all the tasks necessary to complete primary design</li><li>elements for engineering works.</li><li>Performance at this level requires developmental experience in a professional position,</li></ul><h4>Qualifications</h4><ul><li>Master of Engineering degree (or equivalent education) in an appropriate engineering discipline from an accredited college or university. </li><li>Chartered Engineer (CEng), or Professional Engineer (PE) license or equivalent in the relevant field from any global organization (e.g., Institution of Civil Engineers, UK)</li><li>12+ Years experience.</li><li>Experienced in Points Heating, Signalling Power, Power system analysis, ETAP, AMTECH etc.</li><li>Experienced in the use of UK Network Rail, and Railway Group Standards as well as the relevant British Standards and Eurocodes.</li><li>Understanding of Health and Safety including CDM</li><li>Good standard of written English and communication.</li><li>Strong Electrical Engineering background with Rail industry experience.</li></ul><h4>Additional Information</h4>At AECOM, our Freedom to Grow philosophy supports flexibility and balance to help our people thrive. As part of this approach, we ask all hybrid employees to work from an AECOM office at least three days per week.About AECOM AECOM is proud to offer comprehensive benefits to meet the diverse needs of our employees. Depending on your employment status, AECOM benefits may include medical, dental, vision, life, AD&amp;D, disability benefits, paid time off, leaves of absences, voluntary benefits, perks, flexible work options, well-being resources, employee assistance program, business travel insurance, service recognition awards, retirement savings plan, and employee stock purchase plan. AECOM is the global infrastructure leader, committed to delivering a better world. As a trusted professional services firm powered by deep technical abilities, we solve our clients’ complex challenges in water, environment, energy, transportation and buildings. Our teams partner with public- and private-sector clients to create innovative, sustainable and resilient solutions throughout the project lifecycle – from advisory, planning, design and engineering to program and construction management. AECOM is a Fortune 500 firm that had revenue of $16.1 billion in fiscal year 2024. Learn more at aecom.com. What makes AECOM a great place to work You will be part of a global team that champions your growth and career ambitions. Work on groundbreaking projects - both in your local community and on a global scale - that are transforming our industry and shaping the future. With cutting-edge technology and a network of experts, you’ll have the resources to make a real impact. Our award-winning training and development programs are designed to expand your technical expertise and leadership skills, helping you build the career you’ve always envisioned. Here, you’ll find a welcoming workplace built on respect, collaboration and community - where you have the freedom to grow in a world of opportunity. As an Equal Opportunity Employer, we believe in your potential and are here to help you achieve it. All your information will be kept confidential according to EEO guidelines. <h4>Experience Level</h4>Senior Level

Aecom India Pvt Ltd

Chief Engineer

ASIC RTL Engineer III, Silicon<h4>Minimum qualifications:</h4><ul><li>Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.</li><li>4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.</li><li>Experience with logic synthesis techniques to optimize RTL code, performance and power, as well as low-power design techniques.</li></ul> <h4>Preferred qualifications:</h4><ul><li>Master's or PhD degree in Electrical Engineering, Computer Engineering, or Computer Science.</li><li>Experience with a scripting language like Perl or Python.</li><li>Experience with ASIC or FPGA design verification, synthesis, timing/power analysis, and DFT.</li><li>Knowledge of high-performance and low-power design techniques, assertion-based formal verification, FPGA and emulation platforms, and SOC architecture.</li><li>Knowledge of memory compression, fabric, coherence, cache, or DRAM.</li></ul><h4>About the job</h4>Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world.<h4>Responsibilities</h4><ul><li>Define the block-level design document (e.g., interface protocol, block diagram, transaction flow, pipeline, etc.).</li><li>Perform RTL coding, function/performance simulation debug, and Lint/Clock Domain Crossing (CDC)/Formal Verification (FV)/Unified Power Format (UPF) checks.</li><li>Participate in synthesis, timing/power closure, and FPGA/silicon bring-up.</li><li>Participate in test plan and coverage analysis of the block and ASIC-level verification.</li><li>Communicate and work with multi-disciplined and multi-site teams.</li></ul><h4>Experience Level</h4>Senior Level

Principal Physical Design engineerMicrosoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the AI Silicon Engineering team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.   We are looking for a Principal Physical Design Engineer to join the team.  #SCHIE <h4>Responsibilities</h4>We are seeking a highly skilled and experienced Physical Design Engineer to join our dynamic team. As a key member of our semiconductor design team, you will be responsible for physical design implementation and physical integration efforts to ensure the successful development of cutting-edge semiconductor products.  <ul><li aria-setsize="-1">As a Principal Physical Design Engineer, you will be responsible for Physical Design tasks at block, subsystem, sub-chip, and/or full-chip level.  The tasks will include Floorplanning, Synthesis, Placement, CTS and custom clocking, Routing, Static Timing, Physical Verification, Formal Equivalency, Power Efficiency, IR-Drop, and EM.  You may also be involved in Physical Design flow development/automation and evaluation of and recommendations for technology, IP, and vendor selection.  </li></ul><ul><li aria-setsize="-1">Expected to drive PD team at block/Sub System / Sub Chip / SOC level to set and deliver quality results as per planned milestone goals. </li></ul><ul><li aria-setsize="-1">You are expected to be able to work with limited direction, have keen attention to detail, and be able to provide crisp status of progress, issues, and risks on the program to the management team.  Occasional travel may be required.  </li></ul><h4>Qualifications</h4><ul><li aria-setsize="-1">Bachelor's or master’s in electrical or computer engineering or related field with 12+ years of experience  </li></ul><ul><li aria-setsize="-1">Experience in physical design implementation, signoff at block / sub system / sub-chip / SoC level. </li></ul><ul><li aria-setsize="-1">Experience in tapeouts of complex ASICs in leading edge technology  </li></ul><ul><li aria-setsize="-1">Experience in leading team to deliver planned PD goals. </li></ul>  Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.    This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.  As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.  Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances.  We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the <a href="https://careers.microsoft.com/us/en/accommodationrequest" rel="noopener" target="_blank">Accommodation request form</a>. Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.<h4>Experience Level</h4>Senior Level

Full Stack Architect <ul><li>Lead innovation with Vue.js, Node.js, Python, and cloud-native tools like Docker, Kubernetes, Helm, and Kafka.</li><li>Build high-performance, scalable applications, design APIs, and manage multi-environment deployments.</li><li>Short joiners preferred</li></ul> Share your updated resume now.

Live Connections

Full Stack Engineer

C++ Senior Technical Lead Qualifications:<ul><li>Looking for 8-10 years of work experience in C++, QT with QML</li><li>&nbsp;Good experience in UI Modelling Language QML and its integration with QT for user interface.</li><li>Should have experience in C++ and Object-oriented design.</li><li>Having good experience in SAFe Agile Methodology,</li><li>Knowledge on Git and Jenkin</li><li>Works collaboratively with agile team to implement and deliver quality solutions for applications with HMI.</li><li>Designs software components and modules using appropriate modelling techniques following agreed software design standards, patterns, and methodology.</li><li>Must have excellent communication skills.</li></ul>&nbsp;&nbsp;Description:<ul><li>We are looking for a C++ Developer with 8-10 years of rich experience to join our dynamic team for the frontend(QT\QML) and backend(C++) development.&nbsp;</li><li>Candidate should have&nbsp;experience in C++ programming, along with expertise in designing technical solutions.</li><li>Design, develop, and maintain high-quality C++ applications and QML for HMI.</li><li>Collaborate with cross-functional teams to define, design, develop and ship new features.</li><li>Debug and optimize existing code to improve performance and reliability.</li><li>Implement best practices for software development, including code reviews and unit testing.</li><li>Stay updated on the latest advancements in C++ and required technologies.</li><li>Technically lead squads with different modules and take ownership on the team deliveries.</li><li>Total Experience Expected: 08-10 years</li></ul> Education<ul><li>B.Tech</li></ul>

Sopra Steria India Limited

ASIC Engineer, IP Design, Silicon<h4>Minimum qualifications:</h4><ul><li>Bachelor’s degree in Electrical/Computer Engineering or equivalent practical experience.</li><li>3 years of experience with Register-Transfer Level (RTL) design and integration using Verilog/System Verilog, microarchitecture and automation.</li><li>Experience with RTL design using Verilog/System Verilog and microarchitecture.</li><li>Experience with a scripting language like Python or Perl.</li></ul> <h4>Preferred qualifications:</h4><ul><li>Master's degree in Computer Science or Electrical Engineering.</li><li>6 years of industry experience with IP design.</li><li>Experience with methodologies for low power estimation, timing closure, and synthesis.</li><li>Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC).</li></ul><h4>About the job</h4>Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.<h4>Responsibilities</h4><ul><li>Define microarchitecture details, block diagram, data flow, pipelines, etc.</li><li>Perform RTL development (SystemVerilog), debug functional/performance simulations.</li><li>Perform RTL quality checks including Lint, CDC, Synthesis, UPF checks.</li><li>Participate in synthesis, timing/power estimation and FPGA/silicon bring-up.</li><li>Communicate and work with multi-disciplined and multi-site teams.</li></ul><h4>Experience Level</h4>Mid Level

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