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SoC Design Engineer Job Descriptions &amp; RequirementsThis person will be part of the next generation Design team. Requires strong hands-on knowledge of all facets of the SOC design process and good understanding of SOC Architecture. Key Responsibilities:• Strong knowledge in IP/SOC design methodologies.•Sound knowledge of RTL/SOC design/integration with Verilog/system Verilog• Strong experience in Synthesis, timing, full chip netlist &amp; front-end design tools&amp; flows Low power design• Mentoring juniors and enhancing their skill set• Must have strong knowledge of AMBA AHB/AXI protocol• Working knowledge on code coverage, functional coverage, Lint, CDC etc• IP development and coding using standard coding guide lines knowledge• Excellent communication skills. Must be able to participate &amp; lead in global meetings• Soft skills to be able to work in a cross functional international team digital and software design engineers Preferred Experience:• 4-10 years of RTL design, ArchitectureSOC implementation experience:• Ability to work well in a dynamic, fast-paced, pressure filled environment.

Modernize Chip Solutions

Embedded Systems Engineer

PD Engineer Experience:&nbsp;3-8 YearsPosition Requirements• Experienced with ASIC design flow, hierarchical physical design strategies, and methodologies and understand deep sub-micron technology issues.• Solid knowledge on LP Design, static timing analysis, EM/IR-Drop/crosstalk analysis, physical verification, DFM.• Successful track records of taping out complex, 16nm/10nm/7nm/5nm/3nm SOC chips.• Automation and programming-minded, solid coding experience in Tcl/Perl/Python.• Innovative, self-motivated, able to work independently or as a team player, excellent verbal and written communication skills in English.• Strong timing analysis skills.• Strong physical implementation flow debugging skills.• Strong scripting skills.

Junior Mechanical Engineer

Senior Staff Applications Engineer<h4>
 
 General Information
 </h4>






 Job Title
 

 Senior Staff Applications Engineer
 



 Job ID
 

 12246
 



 Country
 

 India
 



 City
 

 Bengaluru
 



 Date Posted
 

 17-Jul-2025
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 Applications Engineering
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

<h4 id="isPasted">Alternate Job Titles:</h4><ul><li>Senior Staff Applications Engineer</li><li>Post-Sales Application Engineer – Interface IP</li><li>Technical Solutions Engineer – IP Integration</li><li>Staff Engineer – Customer Success (IP)</li></ul><h4>We Are:</h4>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.<h4>You Are:</h4>You are a deeply skilled engineering professional with a passion for enabling the success of others. You thrive in a dynamic, customer-facing environment, where your technical expertise and problem-solving abilities are tested daily. You have a strong foundation in ASIC/SoC front-end design, with hands-on experience in RTL coding, synthesis, timing analysis, and formal verification. You’re adept at debugging complex designs—whether in simulation, emulation, or actual silicon—and you understand the intricacies of at least one industry-standard protocol such as USB. Collaboration is at the heart of your work style: you communicate effectively with both customers and internal teams, translating technical needs into actionable solutions. You take initiative, anticipate challenges, and enjoy the satisfaction of resolving tough issues. Your high degree of self-motivation, personal responsibility, and analytical rigor ensures that you deliver results even under pressure. You are eager to share best practices, drive continuous improvement, and contribute to the broader success of your team and customers alike. If you are excited about tackling new challenges, committed to excellence, and ready to make a real impact in the semiconductor industry, you will find your place at Synopsys.<h4>What You’ll Be Doing:</h4><ul><li>Providing expert technical support to customers integrating Synopsys Interface IPs into their SoC designs.</li><li>Analyzing and resolving complex issues related to IP configuration, integration, and usage across various platforms.</li><li>Interfacing directly with customers to understand their design and verification flows, identifying both current and future needs.</li><li>Collaborating with cross-functional teams to address and resolve customer challenges efficiently.</li><li>Debugging and troubleshooting designs in simulation, emulation, and silicon environments.</li><li>Driving the adoption of best practices and lessons learned from customer interactions back into product development.</li><li>Proactively engaging with customers during integration and silicon debug phases to ensure successful deployment.</li></ul><h4>The Impact You Will Have:</h4><ul><li>Accelerating customer time-to-market by providing timely and accurate technical guidance.</li><li>Enhancing customer satisfaction and trust in Synopsys’ IP solutions through effective support and problem resolution.</li><li>Contributing real-world feedback to product development, improving the robustness and usability of Synopsys IP.</li><li>Reducing post-sales escalations and ensuring smooth IP integration for major industry players.</li><li>Fostering long-term customer partnerships by consistently exceeding expectations.  </li><li>Helping shape the direction of next-generation IP products based on customer needs and industry trends.</li></ul><h4>What You’ll Need:</h4><ul><li>Bachelor’s or Master’s Degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.</li><li>Minimum 8 years of relevant experience in ASIC/SoC front-end design, including RTL coding (Verilog), logic and clock tree synthesis, static timing analysis, and equivalence checking.</li><li>Full understanding of digital design methodologies and tools, including formal verification.</li><li>Domain knowledge of at least one interface protocol (e.g., USB); experience with additional protocols (PCIe, DDR, SATA, HDMI, MIPI, Ethernet) is a plus.</li><li>Experience supporting at least one ASIC/SoC tape-out from concept to full production.</li><li>Strong silicon debug and troubleshooting skills are highly desirable.</li></ul><h4>Who You Are:</h4><ul><li>Technically creative, results-oriented, and able to manage multiple priorities efficiently.</li><li>Strong communicator who can explain complex technical concepts to diverse audiences.</li><li>High degree of self-motivation and personal responsibility.</li><li>Excellent analytical, reasoning, and problem-solving skills with keen attention to detail.</li><li>Collaborative team member who thrives in cross-functional environments.</li></ul><h4>The Team You’ll Be A Part Of:</h4>You will join the Solutions Group at Synopsys, a highly collaborative team dedicated to delivering world-class IP solutions and customer success. Working closely with experts in design, verification, applications engineering, and product development, you will be at the forefront of supporting and enabling the most innovative semiconductor companies across the globe. Our team values knowledge sharing, continuous learning, and a proactive approach to solving the industry’s toughest challenges.<h4>Rewards and Benefits:</h4>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.<h4>Experience Level</h4>Senior Level

Synopsys India Pvt Ltd

Senior Application Engineer

BSP Developer Key Skills:&nbsp;◾ BSP (Board Support Package) Development&nbsp;◾ Embedded Systems Programming&nbsp;◾ Diag, USB, Storage, PMIC&nbsp;◾ Expertise in Clock Management, Buses &amp; Peripherals&nbsp;◾ Strong Knowledge of Memory Management in Embedded Systems Experience: 3 – 5 Years Share your updated resume now.

MosChip Technology Ltd

Developer

Embedded Software Developer- Automotive Experience:&nbsp;4-8 YearsJob Category:&nbsp;Embedded Software You will be responsible for :• Implement sensing, control algorithms• Device drivers development for embedded controllers•Develop automotive software components according to AUTOSAR Model-Based Design• Deliver highly reliable system-level software• Follows safety and regulatory compliance requirements. Skills:• Strong C Experience• Understanding of MISRA-C guidelines• Experience with ADAS, Infotainment, V2X, Telematics features• Experience with QNX, LYNXOS-178 or Automotive Grade Linux• Experience with CAN, CAN-FD, SAE J1939, UDS/ISO 14229, LIN• Comprehensive experience with Vector CAN Tools (CANalyzer, CANoe)• Experience with OCPP, ISO 15118, OBD2 (SAE J1979), AUTOSAR standards• Strong analytical and debugging skills

Embedded Software Developer

Principal - ASIC Digital Design (Physical Implementation/Design/STA)<h4>
 
 General Information
 </h4>






 Job Title
 

 Principal - ASIC Digital Design (Physical Implementation/Design/STA)
 



 Job ID
 

 6673
 



 Country
 

 India
 



 City
 

 Noida
 



 Date Posted
 

 28-Sep-2024
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 ASIC Digital Design
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

Principal - ASIC Digital Design (Physical Implementation/Design/STA, experience - 12+ Years) We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and experienced ASIC Digital Design Engineer passionate about working on the latest processes for STA and physical implementation flows on cutting-edge technology nodes. You thrive in dynamic environments and excel in collaborating with functional teams to optimize and develop IO validation vehicles, Mixed Signal IPs, 3DIO PHYs and UCIe-3D PHY. You have a strong focus on Timing Closure and are adept at defining signoff criteria. Your background includes extensive experience with ASIC design flow, hierarchical physical design strategies, and a deep understanding of sub-micron technology issues. You possess a strong knowledge of timing analysis, constraints management, and various verification strategies, including Primepower-based power analysis. Your scripting skills are excellent, and you are innovative, self-motivated, and able to work both independently and as part of a team. Your communication skills, both verbal and written, are outstanding, and you have a desire to understand RTL/Timing signoff criteria. What You’ll Be Doing: * Working on new processes for physical implementation flows and cutting-edge technology nodes. * Collaborating with functional teams to optimize and develop Qualificaition vehicles and 3D PHYs. * Defining signoff criteria with a strong focus on Timing Closure. * Maturing the physical implementation guide used for customers and internal hardening teams. * Participating in next-generation physical design methodology and flow development. * Performing physical design implementation, including synthesis, floor planning, PG Grid design, PnR, CTS, STA, and power/signal integrity signoff. * Evaluating PPA targets (Area/Speed/Power) and collaborating with the design team to improve design and constraints. The Impact You Will Have: * Ensuring the optimization and successful implementation of cutting-edge technology nodes. * Contributing to the development of high-performance silicon chips and software content. * Enhancing the efficiency and performance of Synopsys’ IPs through rigorous timing closure and signoff criteria. * Improving customer satisfaction by maturing physical implementation guides. * Supporting the achievement of Synopsys' operational goals through innovative design solutions. What You’ll Need: * Extensive experience with ASIC design flow and hierarchical physical design strategies. * Strong background in timing analysis, constraints management, and frontend synthesis. * Experience with physical-aware synthesis, formality, and various verification strategies. * Knowledge of Primepower-based power analysis and clock gating for power reduction. * Fair knowledge of FC design planning methodologies, floor planning, and PG Grid creation using Synopsys Tools. * Strong physical implementation flow debugging skills and scripting abilities. Who You Are: Innovative, self-motivated, and able to work independently or as a team player. Excellent verbal and written communication skills. Strong analytical and problem-solving abilities. Passionate about continuous learning and staying updated with the latest technological advancements in ASIC digital design. The Team You’ll Be A Part Of: You will join a highly skilled and collaborative team focused on developing and optimizing physical design flows for cutting-edge technology nodes. The team is dedicated to innovation, continuous improvement, and delivering high-performance solutions that meet the evolving needs of our customers. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.<h4>Experience Level</h4>Senior Level

Mechanical CAD Designer

Teamcenter/PLM ArchitectWe are seeking a highly skilled Senior Software Engineer with a strong background in Product Lifecycle Management (PLM) systems and cloud-based solutions. The ideal candidate will have extensive experience with Java/Spring Boot, microservices architecture, and cloud platforms, particularly Google Cloud Platform (GCP). Proficiency in NOSQLDB is also required.Strong knowledge in PLM Teamcenter Architecture, Customization (ITK, SOA, RAC and AWC) and configurations. Design and build scalable microservices using Java/Spring Boot.Leverage Google Cloud Platform (GCP) to deploy, manage, and optimize cloud-based applications.Utilize MongoDB for data storage, ensuring optimal performance and reliability.Collaborate with cross-functional teams to integrate PLM systems with other enterprise applications.Participate in the full software development lifecycle, including requirements gathering, design, development, testing, and deployment.Troubleshoot and resolve technical issues, providing timely and effective solutions.Strong knowledge in PLM Teamcenter Architecture, Customization (ITK, SOA, RAC and AWC) and configurations. Design and build scalable microservices using Java/Spring Boot.Leverage Google Cloud Platform (GCP) to deploy, manage, and optimize cloud-based applications.Utilize MongoDB for data storage, ensuring optimal performance and reliability.Collaborate with cross-functional teams to integrate PLM systems with other enterprise applications.Participate in the full software development lifecycle, including requirements gathering, design, development, testing, and deployment.Troubleshoot and resolve technical issues, providing timely and effective solutions.<h4>Experience Level</h4>Senior Level

Ford Motor

Senior Software Engineer

Principal Hardware Engineering, Analog Validation Engineer<h4>Company Description</h4>Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.<h4>Job Description</h4>Analog/ Electrical Validation and Characterization EngineerSandisk, a global storage leading company, is looking for an experienced hardware technical leader for developing characterization methods and be the technical team leader.As a characterization engineer you will focus on hands-on multi-disciplinary characterizations and Failure Analyses of Flash memory products as well as technically leading your team mates.Summary of essential job functions:<ul><li>Perform comprehensive characterization methods of embedded memory company products, including developing and implementing new testing protocols</li><li>Characterize high speed SerDes interfaces, practice signal and power integrity analyses, analog IPs and execute failure analyses and product integration activities in SNDK labs</li><li>Demonstrate good understanding of Analog/HW Validation flow with hands-on experience in PCIE/UFS/DDR interfaces</li><li>Technically lead and mentor a team of HW validation engineers, providing guidance on complex issues and fostering professional growth</li><li>Design and execute test plans for new product validation, ensuring thorough coverage of all critical parameters</li><li>Analyze and interpret complex data sets, preparing detailed reports and presentations for both technical and non-technical audiences</li><li>Collaborate with cross-functional teams including design, product, and manufacturing to resolve technical issues and improve product performance</li><li>Stay current with industry trends and emerging technologies in flash memory and analog validation techniques</li><li>Develop and maintain documentation for validation processes, test procedures, and best practices</li><li>Participate in design reviews and provide valuable input on product testability and validation strategies</li><li>Troubleshoot and debug complex hardware issues, utilizing advanced lab equipment and analytical skills</li><li>Optimize existing validation processes to improve efficiency and reduce time-to-market</li><li>Contribute to the development of internal tools and automation scripts to enhance validation capabilities</li><li>Represent the validation team in technical discussions with customers and partners when required</li></ul><h4>Qualifications</h4>Requirements:<ul><li>B.E in Electronic &amp; Electrical Engineering </li><li>Hands on proven experience of 7-12 years in lab measurements - must</li><li>Familiarity with high end Oscilloscopes, TDR, PS measurements - must</li><li>Familiarity with Sampling scope, VNAs &amp; BERTs – an advantage</li><li>Working experience with USA based companies – an advantage</li></ul><h4>Additional Information</h4>Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at <a href="mailto:jobs.accommodations@sandisk.com">jobs.accommodations@sandisk.com</a> to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.<h4>Experience Level</h4>Senior Level

SanDisk India Device Design Centre Pvt.Ltd

Electronic Engineer

Sr.Engineer, StackWhat you need : • Development experience on Cellular Radio products complying to 3GPP specification for E-UTRA (LTE) and NR• Familiar with communication interfaces Ethernet / TCP/IP / UDP .• Should have good knowledge on RAN protocol and interfaces. o LTE/5G  AS protocol  layers - PHY, MAC, RLC, PDCP, RRC• Excellent Log analysis and debugging skills.• Must be strong in C/C++ Programming and Linux OS.• Hands on experience on debugging in Linux environment with tools like GDB, QXDM, TM500, QCAT etc.• Good to have experience of Git.
<h4>What you will do </h4><ul><li>Developing Cellular Radio products complying to 3GPP specification for E-UTRA (LTE) and NR</li><li>Coding in Linux environment across layer3 and layer2 protocols.  </li><li>Working with Git in Linux environment</li><li>Log analysis and debugging of customer defects and internal QA issues.</li><li>Log analysis using tools like GDB, QXDM, TM500, QCAT etc.</li></ul><h4>Experience Level</h4>Senior Level

PARALLEL WIRELESS INDIA PRIVATE LIMITED

Full Stack Engineer

Staff Engineer (Memory Circuit Design)<h4>Company Description</h4>Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.<h4>Job Description</h4>Responsibilities include:<ul><li>In this position the individual will be responsible for designing, modifying and evaluating CMOS circuit structures for the most advanced high-performance low-power 3-dimensional NAND flash memory</li><li>Verify designs in simulation and interact with layout, logic and other functional groups for implementation, full chip integration and silicon validation.</li><li>Evaluation of these circuits will be done through FINESIM and VERILOG simulations.</li><li>Collaborate with characterization engineers to fully characterize silicon, and partner with other designers to develop solutions for silicon issues</li><li>Responsible for full chip silicon evaluation through probing.</li><li>Interact with Memory Device team for transistor models, EDR/GDR requirements and tradeoffs.     </li><li>CMOS transistor level design, simulation, layout knowledge of common custom circuits like amplifiers, current mirrors, level shifters, switches, decoders.</li><li>Knowledge of running and debugging Verilog simulations</li><li>Good understanding of Solid-State device physics.</li><li>Comfortable with IC tools such as Cadence analog design environment, HSPICE/FINESIM, VCS/EXCELIUM, UNIX.</li><li>Ability to troubleshoot and analyze complex problems.</li><li>Excellent communication skills to effectively collaborate with Off-site counterparts across global teams</li></ul><h4>Qualifications</h4><ul><li>B.E./B.Tech/M.E/M.S/M.Tech in electronics branches</li><li>Aggregate of 75% &amp; Above in all qualifying exams</li><li> 4+ years of relevant Industry Experience</li></ul><h4>Additional Information</h4>Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at <a href="mailto:jobs.accommodations@sandisk.com">jobs.accommodations@sandisk.com</a> to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.<h4>Experience Level</h4>Senior Level

Trainee Engineer

Verification Engineer MosChip is growing, and we’re on the lookout for experienced professionals to join our dynamic team in Hyderabad!Experience - 8 to 11 years Share your updated resume now.

Testing Engineer

Memory Layout Engineer - Staff<h4>
 
 General Information
 </h4>






 Job Title
 

 Memory Layout Engineer - Staff
 



 Job ID
 

 12499
 



 Country
 

 India
 



 City
 

 Hyderabad
 



 Date Posted
 

 07-Aug-2025
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 Layout Design
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

 You Are:You are an experienced Memory Layout Design Engineer with a passion for developing cutting-edge technology. You possess a Bachelor’s or Master’s degree in Electronics Engineering, Telecommunication, Physics, or related fields. With a minimum of 6 years of experience in layout design, you have advanced knowledge of Custom Layout and a deep understanding of Embedded Memory Layout. Your strong communication, documentation, and analytical skills enable you to collaborate effectively with cross-functional teams. You are detail-oriented, proactive, and thrive in a dynamic environment where innovation and continuous improvement are paramount.What You’ll Be Doing:<ul><li>Design, develop, and modify layout designs for Embedded Memory IPs.</li><li>Improve and determine methods and procedures for layout development flow to ensure efficiency and accuracy.</li><li>Collaborate with design engineers to optimize layout designs for performance and manufacturability.</li><li>Conduct layout verification and ensure compliance with design rules and specifications.</li><li>Provide technical guidance and mentorship to junior layout engineers.</li><li>Stay updated with the latest industry trends and technologies to incorporate best practices in layout design.</li></ul>The Impact You Will Have:<ul><li>Enhancing the performance and reliability of our Embedded Memory IPs and other foundational IPs.</li><li>Contributing to the efficiency and effectiveness of our layout development processes.</li><li>Ensuring high-quality and manufacturable layout designs that meet industry standards.</li><li>Supporting the seamless integration of our IPs into customer designs, accelerating their time-to-market.</li><li>Driving innovation in layout design and setting new benchmarks for excellence in the industry.</li><li>Fostering a culture of continuous improvement and technical excellence within the team.</li></ul>What You’ll Need:<ul><li>Bachelor’s or Master’s degree in Electronics Engineering, Telecommunication, Physics, or related fields.</li><li>Minimum of 6 years of experience in Memory layout design.</li><li>Advanced knowledge of Custom Layout and a deep understanding of Embedded Memory Layout.</li><li>Strong communication, documentation, and analytical skills.</li><li>Proficiency in layout verification tools and methodologies.</li><li>Scripting knowledge in python and/or TCL is highly preferred</li></ul>Who You Are:<ul><li>Detail-oriented and meticulous in your work.</li><li>Proactive and able to work independently as well as part of a team.</li><li>Excellent problem-solving skills and the ability to think critically.</li><li>Adaptable and open to learning new technologies and methodologies.</li><li>A strong communicator who can effectively collaborate with cross-functional teams.</li></ul>The Team You’ll Be A Part Of:You will be part of a dynamic and innovative team focused on developing high-performance silicon IPs. Our team collaborates closely with design engineers, verification engineers, and other stakeholders to deliver best-in-class solutions. We are committed to continuous learning and improvement, fostering an environment where creativity and technical excellence thrive.Rewards and Benefits:We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.<h4>Experience Level</h4>Senior Level

Computer Engineer

Engineering Manager - FlashArrayWe’re in an unbelievably exciting area of tech and are fundamentally reshaping the data storage industry. Here, you lead with innovative thinking, grow along with us, and join the smartest team in the industry.This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us.We’re in an unbelievably exciting area of tech and are fundamentally reshaping the data storage industry. Here, you lead with innovative thinking, grow along with us, and join the smartest team in the industry.This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us.<h4>Should You Accept This Challenge…</h4>Pure Storage is seeking an Engineering Manager to lead the Feature, Insights &amp; Tools team  at Pure, responsible for developing and scaling the automated test infrastructure for our all-flash storage solutions. This role requires a hands-on leader with a passion for improving efficiency, streamlining build-test pipelines, and driving faster development cycles.As an Engineering Manager, you will:<ul><li>Lead a team of talented software engineers based in Bangalore, improving build-test pipelines to enable faster feature delivery.</li><li>Collaborate with global teams, including product management, feature teams, and release teams, to optimize automation strategies.</li><li>Work with key stakeholders across multiple global locations, including Bangalore, Prague, and Santa Clara HQ.</li><li>Drive automation strategies, ensuring scalable, resilient, and deterministic pipelines that seamlessly integrate into CI/CD workflows.</li><li>Address test flakiness, enhance pipeline stability, and improve test determinism, reducing delays in feature rollouts.</li><li>Lead by example, contributing hands-on to design, development, debugging, and making development pipelines robust.</li><li>Mentor and develop engineers, fostering technical excellence and career growth.</li><li>Define and leverage key metrics to refine automation processes, track efficiency improvements, and optimize release cycles.</li></ul><h4>What You’ll Bring To The Team…</h4><ul><li>BS in Computer Science or equivalent experience</li><li>3+ years of technical management experience, leading software engineers while remaining hands-on with software development, test automation, and troubleshooting.</li><li>10+ years of software development experience in Python, Golang, or similar languages, with expertise in microservices, REST APIs, pytest, and developer tooling.</li><li>Proven expertise in managing projects throughout the software development lifecycle (SDLC)</li><li>Deep understanding of automated test frameworks, CI/CD pipelines, and scalable build-test automation</li><li>Experience in troubleshooting and managing complex automation systems</li><li>Ability to foster collaboration across software and Hardware teams to enhance developer efficiency</li><li>Demonstrated leadership and problem-solving skills in scaling test infrastructure, building tools, microservices, and improving pipeline performance</li><li>Experience working with cross-functional teams and global stakeholders, ensuring effective communication and alignment with teams in Bangalore, Prague, and Santa Clara HQ.</li><li>Excellent written and verbal communication skills, with the ability to present technical concepts to executive stakeholders</li></ul>At Pure Storage, we believe in continuous improvement, ownership, and innovation. If you are passionate about building world-class automation frameworks, optimizing development workflows, and accelerating feature delivery, we’d love to hear from you!WHAT YOU CAN EXPECT FROM US:<ul><li>Pure Innovation: We celebrate those who think critically, like a challenge and aspire to be trailblazers.</li><li>Pure Growth: We give you the space and support to grow along with us and to contribute to something meaningful. We have been Named Fortune's Best Large Workplaces in the Bay Area™, Fortune's Best Workplaces for Millennials™ and certified as a Great Place to Work®!</li><li>Pure Team: We build each other up and set aside ego for the greater good.</li></ul>And because we understand the value of bringing your full and best self to work, we offer a variety of perks to manage a healthy balance, including flexible time off, wellness resources and company-sponsored team events. Check out <a href="http://purebenefits.com">purebenefits.com</a> for more information.ACCOMMODATIONS AND ACCESSIBILITY:Candidates with disabilities may request accommodations for all aspects of our hiring process. For more on this, contact us at <a href="mailto:TA-Ops@purestorage.com">TA-Ops@purestorage.com</a> if you’re invited to an interview.OUR COMMITMENT TO A STRONG AND INCLUSIVE TEAM:We’re forging a future where everyone finds their rightful place and where every voice matters. Where uniqueness isn’t just accepted but embraced. That’s why we are committed to fostering the growth and development of every person, cultivating a sense of community through our Employee Resource Groups and advocating for inclusive leadership. Pure is proud to be an equal opportunity and affirmative action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or any other characteristic legally protected by the laws of the jurisdiction in which you are being considered for hire.<h4>Experience Level</h4>Mid Level

Pure Storage India Pvt Ltd

Engineering Manager

Member Of Technical Staff-Drive FW Validation EngineerWe’re in an unbelievably exciting area of tech and are fundamentally reshaping the data storage industry. Here, you lead with innovative thinking, grow along with us, and join the smartest team in the industry.This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us.BE PART OF BUILDING THE FUTURE.What do NASA and emerging space companies have in common with COVID vaccine R&amp;D teams or with Roblox and the Metaverse? The answer is data, -- all fast moving, fast growing industries rely on data for a competitive edge in their industries. And the most advanced companies are realizing the full data advantage by partnering with Pure Storage. Pure’s vision is to redefine the storage experience and empower innovators by simplifying how people consume and interact with data. <a href="https://www.purestorage.com/content/dam/purestorage/pdf/PureStorage_FactSheet.pdf.">With 11,000+ customers including 58% of the Fortune 500, we’ve only scratched the surface of our ambitions</a>. Pure is blazing trails and setting records:<ul><li>For nine straight years, Gartner has named Pure a leader in the Magic Quadrant </li><li>Our customer-first culture and unwavering commitment to innovation have earned us a certified Net Promoter Score in the top 1% of B2B companies globally</li><li>Industry analysts and press <a href="https://www.purestorage.com/company/newsroom/awards.html">applaud Pure’s leadership</a> across these dimensions</li><li>And, our 5,000+ employees are emboldened to make Pure a faster, stronger, smarter company as we go</li></ul>If you, like us, say “bring it on” to exciting challenges that change the world, we have endless opportunities where you can make your mark.SHOULD YOU ACCEPT THIS CHALLENGE...The DFM Firmware Team plays a crucial role in designing and developing the Direct Flash Module (DFM) – a key module of Pure's Flasharray and Flashblade enterprise storage solutions. The DFM is an internally designed enterprise storage device using the NAND flash technology. Compared with the off-the-shelf SSD, the DFM has the competitive advantage of  simplicity, high performance, low cost and scalability.As a member of the DFM team, you’ll be actively engaged in all phases of the product development cycle with a focus on validation of the various FW modules. You will be involved in analysing the existing tests and enhancing/adding the new test cases to ensure end to coverage of the FW design with a key focus on the exception/error scenarios. You would be also responsible for developing the FW regression test suite which would be used for nightly/weekly runs and helps in assessing the FW stability for the regular and milestone specific FW releases. What You Will Be DoingPure Storage is seeking a full-time Firmware Validation Engineer to join our device firmware team. You will be working as part of a small, but fast growing, dynamic team and will be responsible for:<ul><li>Implementing firmware test for Pure Storage’s DirectFlash™ SSD Modules</li><li>Investigating and debugging issues, and developing failure analysis tools and process</li><li>Coding and testing in C/C++ and Python</li><li>Develops and delivers the firmware verification tests for various firmware SSD/NAND features and enhance the regression test suite</li><li>Internal development automation including continuous integration, automated unit and regression testing, etc</li><li>Working closely with hardware, system software and manufacturing teams</li></ul>The ideal candidate would be someone who is a team player and perceived as highly skilled in test development/debugging for hardware/firmware/system validation needs..What You Bring to the Team<ul><li>8+ years experience developing software to validate hardware components/systems with strong SW &amp; HW debug skills</li><li>Strong knowledge of NAND Flash, Firmware Architecture/Design in Solid State Drive (SSD) or similar storage domain</li><li>Scripting experience in Python with exposure to OOP; C++ experience is a plus.</li><li>Experience in a hardware testing/software testing validation lab for SSDs or Embedded industry segments</li><li>B.E. or M.E in Electrical Eng, Electronics &amp; Communication Eng, Computer Eng</li><li>Experience working at enterprise data storage systems, SSD companies or related component vendors.</li><li>Independent ability to devise, implement, automate and refine qualification methods</li><li>Strong knowledge of hardware design, storage architectures and storage interfaces.</li><li>Experience with failure modes of flash-based devices</li><li>Good verbal communication &amp; collaboration skill.</li><li>Must be willing and able to work in an open office, team environment.</li></ul>WHAT YOU CAN EXPECT FROM US:<ul><li>Pure Innovation: We celebrate those who think critically, like a challenge and aspire to be trailblazers.</li><li>Pure Growth: We give you the space and support to grow along with us and to contribute to something meaningful. We have been Named Fortune's Best Large Workplaces in the Bay Area™, Fortune's Best Workplaces for Millennials™ and certified as a Great Place to Work®!</li><li>Pure Team: We build each other up and set aside ego for the greater good.</li></ul>And because we understand the value of bringing your full and best self to work, we offer a variety of perks to manage a healthy balance, including flexible time off, wellness resources and company-sponsored team events. Check out <a href="http://purebenefits.com">purebenefits.com</a> for more information.ACCOMMODATIONS AND ACCESSIBILITY:Candidates with disabilities may request accommodations for all aspects of our hiring process. For more on this, contact us at <a href="mailto:TA-Ops@purestorage.com">TA-Ops@purestorage.com</a> if you’re invited to an interview.OUR COMMITMENT TO A STRONG AND INCLUSIVE TEAM:We’re forging a future where everyone finds their rightful place and where every voice matters. Where uniqueness isn’t just accepted but embraced. That’s why we are committed to fostering the growth and development of every person, cultivating a sense of community through our Employee Resource Groups and advocating for inclusive leadership. Pure is proud to be an equal opportunity and affirmative action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or any other characteristic legally protected by the laws of the jurisdiction in which you are being considered for hire.<h4>Experience Level</h4>Senior Level

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