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Member Of Technical Staff - HW QualWe’re in an unbelievably exciting area of tech and are fundamentally reshaping the data storage industry. Here, you lead with innovative thinking, grow along with us, and join the smartest team in the industry.This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us.If you, like us, say “bring it on” to exciting challenges that change the world, we have endless opportunities where you can make your mark.The FlashArray team builds the industry’s most innovative, high-performance, and highly available portfolio of products that are designed for the most demanding mission critical applications.  While we deliver a hardware storage array, over 90% of our engineering staff are software engineers. Our customers are the most important part of our business and they love FlashArray for it's simplicity of management, the constant flow of new and exciting upgrades, and ability to live on the cutting edge of technology while never taking downtime, ever. Most recently, we extended the value of our FlashArray capabilities into the cloud with CloudSnap and Cloud Block Store for AWS. These new innovations enable our customers to leverage the agility of the public cloud for both traditional IT and cloud-native applications.  What you'll be doing:<ul><li>Ensuring FlashArray and FlashBlade products and features ship with the highest quality.</li><li>Create System test designs that focus on FlashArray and FlashBlade</li><li>Enable software testbeds to run tests which validate HW quality</li><li>Find statistical and systemic hardware issues earlier in programs</li><li>Work with Support and Escalation teams to help reproduce and root cause customer issues Identifying, analyzing, and documenting any defects discovered during testing.</li><li>Design and build tools that make it efficient to execute and triage a large number of test scripts.</li><li>Understand the inner workings of features to target specific failure domains in our stack to make the product/features fault tolerant and resilient.</li><li>Continuously look for test gaps, perform root cause analysis &amp; close loop on customer found defects.</li></ul>WHAT YOU’LL NEED TO BRING TO THIS ROLE...<ul><li>BS in Computer Science or equivalent.</li><li>8+ years of software system testing experience, or equivalent.</li><li>6+ years of hands-on automation in Python or similar scripting languages.</li><li>Strong knowledge of System testing using end-to-end Automation</li><li>Familiarity with running Jenkins environment</li><li>Familiarity with X86 hardware designs, as well as aspects like BMC BIOS, networking and other system software aspects</li><li>Experience in developing test strategies for server hardware validation </li><li>Good to have some exposure to enterprise products in cloud and container platforms (AWS, Azure, Google Cloud, Kubernetes, Docker).</li><li>Experience with any  virtualization technologies: VMware, Hyper-V, OpenStack, Oracle deployment and customer use cases.</li><li>Experience with multiple operating systems: Linux, Windows.</li><li>Preferred but not required - storage protocols Fibre Channel, FCoE, iSCSI, NVME.</li><li>Ability to independently deploy and maintain test environments.</li><li>Proven analytical and creative problem-solving abilities.</li><li>Capable of prioritizing multiple projects in a fast-paced environment.</li><li>Natural curiosity with excellent written, oral, and interpersonal communication skills.</li><li>Must be willing and able to work in an open office, team environment.</li></ul>WHAT YOU CAN EXPECT FROM US:<ul><li>Pure Innovation: We celebrate those who think critically, like a challenge and aspire to be trailblazers.</li><li>Pure Growth: We give you the space and support to grow along with us and to contribute to something meaningful. We have been Named Fortune's Best Large Workplaces in the Bay Area™, Fortune's Best Workplaces for Millennials™ and certified as a Great Place to Work®!</li><li>Pure Team: We build each other up and set aside ego for the greater good.</li></ul>And because we understand the value of bringing your full and best self to work, we offer a variety of perks to manage a healthy balance, including flexible time off, wellness resources and company-sponsored team events. Check out <a href="http://purebenefits.com">purebenefits.com</a> for more information.ACCOMMODATIONS AND ACCESSIBILITY:Candidates with disabilities may request accommodations for all aspects of our hiring process. For more on this, contact us at <a href="mailto:TA-Ops@purestorage.com">TA-Ops@purestorage.com</a> if you’re invited to an interview.OUR COMMITMENT TO A STRONG AND INCLUSIVE TEAM:We’re forging a future where everyone finds their rightful place and where every voice matters. Where uniqueness isn’t just accepted but embraced. That’s why we are committed to fostering the growth and development of every person, cultivating a sense of community through our Employee Resource Groups and advocating for inclusive leadership. Pure is proud to be an equal opportunity and affirmative action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or any other characteristic legally protected by the laws of the jurisdiction in which you are being considered for hire.<h4>Experience Level</h4>Senior Level

Pure Storage India Pvt Ltd

Member Of Technical Staff

RTL ENGINEER Experience: 4+ YearsThis job might be for you if<ul><li>You enjoy solving problems. You love taking on difficult challenges and finding creative solutions.</li><li>You don’t know the answer but will dig until you find it.</li><li>You communicate clearly. You write well.</li><li>You are motivated and driven. You volunteer for new challenges without waiting to be asked. You will take ownership of the time you spend with us and make a difference.</li><li>You can impress our customers with your enthusiasm to solve their issues (and solve them!)</li></ul> Job Description Required<ul><li>Solid RTL coding experience including</li><li>Microarchitecture of design</li><li>System Verilog and Verilog coding using provided coding styles.</li><li>Understanding of SDC</li><li>Understanding STA reports and how to adjust RTL accordingly.</li><li>Designing for error cases and debug of IP</li><li>Understanding of CDC logic</li><li>Knowledge of lint rules and exceptions</li><li>Design and use of block level simulations to bring up IP.</li><li>Knowledge of AMBA buses and when to use them.</li></ul> Job Description Preferred<ul><li>Experience&nbsp;leading small design team.</li><li>C coding / Firmware skills</li><li>Knowledge on common processor architectures&nbsp;(ARM, RiscV)</li><li>FPGA experience includes part selection, pin assignment, timing constraints, synthesis, and debug of design in the FPGA.</li><li>Lab brings up experience, scripting.</li><li>Relevant tool experience such as: Socrates, Core Consultant in addition&nbsp;to standard simulation tools (xcellium, vcs, etc)</li><li>Emulation experience&nbsp;(Zebu, Palladium, etc)</li><li>Board knowledge, component selection, probing, debug.</li><li>JTAG debugging experience (Coresight, Lauterbach, etc).</li><li>Low power design techniques</li></ul> Qualifications<ul><li>E./B.Tech. degree at minimum.</li></ul>

Eximietas Design

Junior Network Engineer

MS Fabric Architect We are looking for immediate joiners who are open to working in a hybrid modelExperience - 10+ years Share your updated resume now.

Accion labs india pvt ltd

Textile Designer

Embedded Design Engineer Experience:&nbsp;3-8 Years You will be responsible for:• Design, develop, modify software for embedded systems• Board bring up, debug and integrate software on custom hardware• Device driver development and hardware enablement•Pre and Post silicon validation/verification Skills:• Strong C/C++ experience, bare metal programming• Strong experience with U-boot, Embedded Linux, RTOS• IPC, Synchronization Techniques, Multi Threading• Understanding of Yocto, Buildroot, Device Tree• Experience with Shell, Python or Pearl scripting• Comprehensive experience with NXP, STM32, Microchip MCUs and ColdFire, ARM architecture• Strong experience with Trace32, JTAG, GDB, Emulators and Compilers• Understanding of I2C, SPI, UART, PCI, CAN; At least one of the protocols.

Modernize Chip Solutions

Embedded Systems Engineer

Senior Staff Analog Design Engineer<h4>
 
 General Information
 </h4>






 Job Title
 

 Senior Staff Analog Design Engineer
 



 Job ID
 

 10827
 



 Country
 

 India
 



 City
 

 Hyderabad
 



 Date Posted
 

 21-Apr-2025
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 Analog Design
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

<h4 id="isPasted">We Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.<h4>You Are:</h4>You are a passionate and highly skilled engineer committed to advancing the field of high-speed analog design. You bring a wealth of experience in designing critical analog and mixed-signal blocks, particularly for cutting-edge PCIe 6 and PCIe 7 or SerDes PHY solutions. Your technical expertise encompasses transistor-level design, deep knowledge of CMOS (including finFET and SOI processes), and a proven ability to create robust high-speed building blocks—such as LDOs, Bandgap references, ADC/DACs, PLLs, and DLLs—that consistently meet rigorous performance, power, and area targets.You thrive in collaborative, multidisciplinary environments, where your clear communication and mentoring skills empower both peers and junior engineers to excel. Your proactive approach to problem-solving and your dedication to continuous improvement ensure that you stay at the forefront of technology trends. You are adept at analyzing and mitigating jitter, maintaining signal integrity, and ensuring compliance with demanding industry standards. Your experience with porting PHY designs across technology nodes demonstrates your adaptability and commitment to delivering high-quality, innovative solutions. You value documentation, knowledge sharing, and actively contribute to a culture of learning and technical excellence.Most importantly, you are excited to join a team that values diversity, encourages bold ideas, and is committed to shaping the future of high-speed connectivity. You see challenges as opportunities and bring a growth mindset to every project you undertake.<h4>What You’ll Be Doing:</h4><ul><li>Designing and developing advanced analog/mixed-signal blocks for PCIe 6 and PCIe 7 PHY architectures under the guidance of senior technical leaders.</li><li>Ensuring that all designs strictly adhere to PCIe protocol standards, optimizing for performance, power, and area efficiency.</li><li>Porting high-speed PHY designs to various technology nodes while maintaining signal integrity and maximizing performance.</li><li>Collaborating with cross-functional teams—including digital, verification, and layout groups—to successfully integrate analog circuits into complex SerDes PHY systems.</li><li>Implementing innovative verification strategies for high-speed analog/mixed-signal circuits using state-of-the-art simulation and modeling tools.</li><li>Working closely with layout teams to minimize parasitics, device stress, and process variation impacts on overall circuit performance.</li><li>Analyzing simulation and silicon measurement data to validate designs and ensure compliance with PCIe standards.</li><li>Mentoring junior engineers and promoting best practices in analog/mixed-signal design and verification.</li><li>Documenting design features, specifications, and test methodologies for future reference and team knowledge sharing.</li><li>Partnering with characterization teams to validate electrical performance of circuits in silicon and resolve technical challenges.</li></ul><h4>The Impact You Will Have:</h4><ul><li>Drive the development of next-generation PCIe 6 and PCIe 7 PHY designs, advancing high-speed interface technologies that power tomorrow’s data-driven world.</li><li>Ensure Synopsys’ analog/mixed-signal circuits exceed industry standards, reinforcing our reputation for technical excellence and innovation.</li><li>Facilitate seamless integration of analog circuits into sophisticated SerDes PHY systems, enhancing overall performance and reliability.</li><li>Mentor and develop junior engineers, fostering a collaborative and innovative team environment.</li><li>Lead successful porting of PHY designs across multiple technology nodes, delivering versatile and scalable solutions for diverse customer needs.</li><li>Strengthen verification and validation processes, resulting in robust, reliable, and high-performing analog/mixed-signal circuits.</li></ul><h4>What You’ll Need:</h4><ul><li>PhD with 3+ years, or MTech/MS with 7+ years of experience in analog/mixed-signal circuit design focused on high-speed interfaces such as PCIe 6/7 or SerDes PHY designs.</li><li>Proven expertise in transistor-level design of high-speed analog building blocks (e.g., LDOs, Bandgap references, ADC/DACs, PLLs, DLLs).</li><li>Demonstrated silicon experience in developing PHY circuits compliant with PCIe standards.</li><li>Strong background in high-speed SerDes AFE development, including CTLE and CDR design.</li><li>Experience designing high-speed SerDes transmitters and deep knowledge of equalization techniques (e.g., DFE, FIR filters, TX pre-emphasis).</li><li>Solid foundation in jitter budgeting analysis and expertise in minimizing jitter impact on signal integrity.</li><li>Experience porting PHY designs across different technology nodes and deep knowledge of CMOS, finFET, and gate-all-around processes.</li><li>Comprehensive understanding of the PCIe protocol, signal integrity, jitter performance, and high-speed clocking.</li><li>Ability to collaborate with layout teams to minimize parasitics, process variations, and electromigration effects.</li><li>Proven track record of effective teamwork and successful project outcomes across multidisciplinary teams.</li></ul><h4> </h4><h4>Who You Are:</h4><ul><li>Innovative thinker with a passion for high-speed analog design and technology advancement.</li><li>Collaborative team player who values diversity and inclusion.</li><li>Effective communicator, able to translate complex technical concepts to a variety of audiences.</li><li>Mentor and coach, eager to support the development of junior engineers.</li><li>Detail-oriented problem solver with a commitment to quality and continuous improvement.</li><li>Adaptable and resourceful, thriving in fast-paced, changing environments.</li></ul><h4>The Team You’ll Be A Part Of:</h4>You will join a world-class analog/mixed-signal design team at Synopsys, focused on developing high-speed interface IP for next-generation semiconductor products. The team is composed of passionate engineers from diverse backgrounds, collaborating closely to deliver innovative solutions that drive the future of connectivity. Our culture emphasizes technical excellence, knowledge sharing, and continuous learning, providing an environment where your skills and ideas are valued and your career can thrive.<h4>Rewards and Benefits:</h4>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</h4>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.<h4>Experience Level</h4>Senior Level

Synopsys India Pvt Ltd

Electronic Engineer

Lead Engineer – Core Wireless Testing (AMF/MME) What You Work:As a Lead Engineer you will be responsible for driving technical projects, managing resources effectively, balancing team workloads. You will design solutions, oversee testing, and mentor junior engineers to ensure productivity and skill development. Also, you will manage resources, troubleshoot, debug issues, writing and reviewing test cases to ensure code quality, and collaborate with cross-functional teams to deliver high-quality products on time.<ul><li>Knowledge of software development methodology, build tools, and product life cycle</li><li>Build a 5G Cloud-native test solution in a virtualized environment with end to end understanding of 5G Network functions (i.e., AMF, SMF, UPF and PCF) and protocols</li><li>Exposure to customer deployment models and configuration of large mobile packet core solutions</li><li>Have 4-12 years of Industry experience in Mobile packet core technologies with validation background and solid exposure in automation</li><li>You have End to End or System Testing background</li><li>Good knowledge in Kubernetes, docker and Cloud Native solutions</li><li>Experience in bringing up Open stack , VMWare based test setups</li><li>Interest &amp; Passion in Automation and framework development using Python and Robot Framework</li><li>Exposure in Spirent Landslide, Mobilium DsTest or Ixia simulators</li><li>Exposure in automation frameworks like pyats and robot framework.</li><li>Certification in Kubernetes, Exposure to Grafana and Prometheus is added advantage.</li><li>Experience in CI/CD tools Jenkins and GIT</li></ul> Mandatory skills:<ul><li>Solid experience in 5G core End to End validation</li><li>Kubernetes, Docker, OpenStack</li><li>Working exposure on AMF and UPF</li><li>Have been to customer escalation role</li><li>Spirent Landslide</li><li>Python, Shell Scripting, Robot framework</li></ul> Desired skills:<ul><li>Certification in Kubernetes, Exposure to Grafana and Prometheus is added advantage.</li><li>Experience in CI/CD tools Jenkins and GIT</li></ul> Preferred Qualifications:<ul><li>Experience: 6 to 10 years of relevant experience</li><li>Education: B.Tech/BE or any other equivalent degree, PG in communication field</li></ul>

Tejas Networks Ltd

Test Engineer

NVH Engineer (Nastran) We're hiring below position: Skills: NVH Engineer (Nastran)Experience: 4 to 6 yearsLocation: Chennai If interested, share your CV.

Capgemini Engineering

Senior Technical Engineer

Sr Firmware Engineer <a rel="noopener noreferrer" href="\&quot;https://www.linkedin.com/search/results/all/?keywords=%23capgeminiengineering&amp;origin=HASH_TAG_FROM_FEED\&quot;" target="_blank">Capgemini Engineering</a> is hiring Sr Firmware Engineer&nbsp;Experience: 6–9 years Educational Qualifications: BE/ ME/ MS/BTech/MTech Electrical, Electronics , Computer Science Job Description:<ul><li>C/C++ programming</li><li>Embedded system development, Firmware, Device drivers &amp; Board support packages.</li><li>Knowledge of processor architectures – 8bit, 16bit and 32bit, DSPs</li><li>Knowledge of Software development life cycle – SDLC</li><li>Knowledge of Operating System concepts</li><li>Hands on experience on RTOS(GHS Integrity/VxWorks/ FreeRTOS) / Bare Metal Scheduler</li><li>Understand Firmware Architecture , Scheduler / Task manager implementations</li><li>Understand and Implement design represented by&nbsp;Finite State Machine (FSM), State Transition Matrix (STM), STD</li><li>Worked on atleast one full SDLC project/program</li><li>Capability to read hardware designs &amp; schematic.</li><li>Exposure to using oscilloscope, multi-meter.</li><li>Exposure to Industrial&nbsp;/ Medical standards (ISO 13485. IEC 62304, IEC 601010, IEC 61508)</li></ul>

Embedded Software Developer

Senior EngineerArcadis is the world's leading company delivering sustainable design, engineering, and consultancy solutions for natural and built assets.We are more than 36,000 people, in over 70 countries, dedicated to improving quality of life. Everyone has an important role to play. With the power of many curious minds, together we can solve the world’s most complex challenges and deliver more impact together.Role description:At Arcadis IBI, we are seeking a highly skilled Technical Expert with strong academic and professional background in Telecom/IT/Networks to support the Independent Engineer (IE) activities under BSNL’s BharatNet Phase III project. The role involves technical validation, audit, monitoring, and support to ensure effective execution of Optical Fibre Cable (OFC) rollout, equipment integration, and compliance with contractual and quality standards.Position: Senior Engineer– Independent Engineer (IE) Project Project: BSNL BharatNet Phase III Location: West Bengal / Uttar Pradesh Reporting To: Project Manager – Independent Engineer Consortium (RailTel – Lead Partner, Arcadis IBI, Lion Group) Role accountabilities:<ul><li>Oversee and monitor large-scale OFC deployment and related telecom infrastructure implementation in assigned states (West Bengal/Uttar Pradesh).</li><li>Conduct site audits, inspections, and validations of work executed by the Project Implementing Agencies (PIAs).</li><li>Ensure compliance with BSNL contractual obligations, technical standards, and timelines.</li><li>Review and validate designs, BoQs, test plans, and acceptance testing procedures submitted by PIAs.</li><li>Provide technical support in integration of OFC and active equipment with State Network Operations Centers (NOCs).</li><li>Assist in acceptance testing (AT) – Depth AT, Fibre AT, Equipment AT, and NOC integration.</li><li>Support the certification of invoices by validating milestone achievements against contractual deliverables.</li><li>Ensure adherence to quality assurance, safety, and security practices during project execution.</li><li>Prepare and submit technical reports, progress assessments, and recommendations to the Project Manager/BSNL.</li><li>Support BSNL in resolving technical disputes or mismatches in project handover/takeover</li></ul>Qualifications &amp; Experience:<ul><li>Education: B.Tech/B.E./MCA in Electronics &amp; Communication, Computer Science, Telecom, IT, or Electrical &amp; Electronics.</li><li>Experience: Minimum 6 years of relevant industry experience in telecom/IT/OFC projects.</li><li>Certifications (Preferred): CCNA or equivalent network/telecom certifications.</li><li>Experience in large-scale OFC rollout, telecom project audits, and contractual compliance is highly desirable.</li></ul>Key Skills<ul><li>Strong understanding of telecom networks, OFC deployment, and IT systems.</li><li>Familiarity with network testing tools, GIS mapping, and project management tools.</li><li>Knowledge of BSNL/DoT standards, BharatNet project requirements, and government telecom contracts.</li><li>Excellent analytical, reporting, and documentation skills.</li><li>Strong coordination and communication abilities to liaise with BSNL, PIAs, and consortium partners.</li></ul>Work Location<ul><li>Candidate will be based in West Bengal or Uttar Pradesh, with field travel as per project requirements.</li></ul>Why Arcadis?We can only achieve our goals when everyone is empowered to be their best. We believe everyone's contribution matters. It’s why we are pioneering a skills-based approach, where you can harness your unique experience and expertise to carve your career path and maximize the impact we can make together.You’ll do meaningful work, and no matter what role, you’ll be helping to deliver sustainable solutions for a more prosperous planet. Make your mark, on your career, your colleagues, your clients, your life and the world around you.Together, we can create a lasting legacy.Join Arcadis. Create a Legacy.Our Commitment to Equality, Diversity, Inclusion &amp; BelongingWe want you to be able to bring your best self to work every day which is why equality and inclusion is at the forefront of all our activities. Our ambition is to be an employer of choice and provide a great place to work for all our people. We are an equal opportunity employer; women, minorities, and people with disabilities are strongly encouraged to apply. We are dedicated to a policy of non-discrimination in employment on any basis including race, caste, creed, colour, religion, sex, age, disability, marital status, sexual orientation, and gender identity.<h4>Experience Level</h4>Senior Level

Arcadis India Pvt Ltd

Senior Engineer

Technical Program Manager – Physical DesignNVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for 30+ years. It’s an outstanding legacy of innovation that’s motivated by phenomenal technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. Come join our team and see how you can make a lasting impact on the world!We are seeking a highly organized and detail-oriented Physical Design Program Manager to lead and drive execution across complex ASIC/SoC development programs. This role will focus on coordinating internal teams, managing third-party contractors and vendors, and ensuring successful delivery of physical design projects against defined timelines and quality standards. In this role, the Technical Program Manager (TPM) will lead all block/chip level Physical Design (PD) activities, from floor planning to layout verification. This role also includes managing the netlist to GDSII flow, ensuring quality control, and coordinating with engineering teams and contractors. This role is critical for improving PPA and ensuring timely project execution.What you will be doing:<ul><li>Program Management: Drive end-to-end planning and execution of physical design programs, ensuring alignment with engineering goals, schedules, and deliverables.</li><li>Third-Party Contract Management: Oversee engagement with external contractors, ensure clear definition of scope, deliverables, and performance expectations.<ul><li>Streamline onboarding and deboarding processes for contractors.</li><li>Collect daily feedback from contractors to identify potential issues and areas for improvement.</li><li>Handle contractors' timesheets and ensure accuracy for billing and payment.</li><li>Manage contractors' paperwork, including contracts and agreements.</li><li>Manage contractor attrition and replacement, ensuring smooth transitions.</li><li>Frequently remind contractors about information security (infosec) matters.</li></ul></li><li>Vendor Management: Establish and maintain productive relationships with EDA vendors, IP providers, and service partners. Track deliverables, resolve issues, and escalate risks as needed.</li><li>Resource Management: Collaborate with engineering managers to allocate internal and external resources effectively, monitor utilization, and address capacity constraints.<ul><li>Work closely with engineering on various KPIs to improve overall execution processes and deliverables.</li><li>Collaborate with engineering and vendors to deliver and execute the roadmap.</li><li>Participate in sprint planning, stand-ups, sprint reviews, and retrospectives.</li></ul></li><li>Schedule Tracking: Develop and maintain detailed program schedules, track progress, and drive accountability across multiple stakeholders. Identify and mitigate risks proactively.</li><li>Cross-functional Coordination: Partner with design, verification, CAD, and operations teams to ensure seamless execution across all phases of the physical design flow.</li><li>Reporting &amp; Communication: Provide clear, concise program updates to leadership and stakeholders. Highlight risks, dependencies, and mitigation plans.</li><li>Physical Design Leadership: Lead all block/chip level PD activities, including floor plans, abstract view generation, RC extraction, PNR, STA, EM, IR DROP, DRCs, and schematic to layout verification. Collaborate with design teams to address design challenges. Debug tool/design related issues and improve RTL2GDS flow to enhance PPA. Oversee all aspects of physical design and implementation of GPU and other ASICs</li></ul>What we need to see:<ul><li>Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related discipline.</li><li>7+ years of experience in semiconductor industry, with at least 3+ years in program/project management roles.</li><li>Strong understanding of ASIC/SoC design flows, with emphasis on physical design processes.</li><li>Proven experience managing third-party contractors and vendor relationships.</li><li>Excellent organizational, analytical, and communication skills.</li><li>Strong ability to influence without authority and drive cross-functional alignment.</li><li>Familiarity with project management tools (e.g., MS Project, JIRA).</li><li>Familiarity with EDA tool licensing, vendor engagement models, and budget tracking</li><li>Preferred candidates with either PMP certification.</li></ul><h4>Experience Level</h4>Senior Level

Nvidia Graphics Pvt Ltd

Junior Project Engineer

Engineering Manager, Home Infrastructure, Platform and Devices<h4>Minimum qualifications:</h4><ul><li>Bachelor's degree or equivalent practical experience.</li><li>8 years of experience in software development.</li><li>3 years of experience in a technical leadership role; overseeing projects.</li><li>2 years of experience in a people management, supervision/team leadership role.</li><li>Experience building distributed systems at a large scale.</li></ul> <h4>Preferred qualifications:</h4><ul><li>Master’s degree or PhD in Engineering, Computer Science, or a related technical field.</li><li>3 years of experience working in a complex, matrixed organization.</li><li>Experience working with C++ or JAVA.</li></ul><h4>About the job</h4>Like Google's own ambitions, the work of a Software Engineer goes beyond just Search. Software Engineering Managers have not only the technical expertise to take on and provide technical leadership to major projects, but also manage a team of Engineers. You not only optimize your own code but make sure Engineers are able to optimize theirs. As a Software Engineering Manager you manage your project goals, contribute to product strategy and help develop your team. Teams work all across the company, in areas such as information retrieval, artificial intelligence, natural language processing, distributed computing, large-scale system design, networking, security, data compression, user interface design; the list goes on and is growing every day. Operating with scale and speed, our exceptional software engineers are just getting started -- and as a manager, you guide the way. With technical and leadership expertise, you manage engineers across multiple teams and locations, a large product budget and oversee the deployment of large-scale projects across multiple sites internationally. Voice Serving team develops scalable and trustworthy infrastructure to serve journeys triggered by voice and other modalities. We work across multiple areas of the serving stack including understanding, ranking and multi-modal fulfilment. We are constantly evolving our stack to blend the latest technological advances in Artificial Intelligence (AI) to elevate the quality of response to queries. The infrastructure we build ultimately enables highly differentiated experiences across various platforms and surfaces within Google Home.The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world.<h4>Responsibilities</h4><ul><li>Support the design, architecture, and optimization of core functionalities such as query understanding, intent generation, and response planning across voice and other modalities for Agentic flows.</li><li>Assume ownership of the technical roadmaps for multiple Google Home programs.</li><li>Engage closely with cross-functional teams (e.g., infrastructure, intelligence, platform, experience) to ensure alignment.</li><li>Provide technical guidance to both junior and executive engineers, fostering a high-performance environment.</li><li>Demonstrate adaptability and a willingness to undertake new issues to address evolving team requirements.</li></ul><h4>Experience Level</h4>Senior Level

Google India Pvt Ltd

Engineering Manager

Engineer - UK Water Infrastructure (MicroDrainge, SewerGEMS, WaterGEMS, Info Drainage)<h4>Company Description</h4>Work with Us. Change the World.At AECOM, we're delivering a better world. Whether improving your commute, keeping the lights on, providing access to clean water, or transforming skylines, our work helps people and communities thrive. We are the world's trusted infrastructure consulting firm, partnering with clients to solve the world’s most complex challenges and build legacies for future generations.There has never been a better time to be at AECOM. With accelerating infrastructure investment worldwide, our services are in great demand. We invite you to bring your bold ideas and big dreams and become part of a global team of over 50,000 planners, designers, engineers, scientists, digital innovators, program and construction managers and other professionals delivering projects that create a positive and tangible impact around the world.We're one global team driven by our common purpose to deliver a better world. Join us.<h4>Job Description</h4>· Carrying out detailed civil design of Water / Wastewater, Stormwater projects preferably within a UK water companies framework contracts (Potential candidates willing to learn European standards and follow the process to get trained in a short time span are welcome)· Experience of hydraulic design of pipelines (Clean &amp; Wastewater), good understanding about pipe fittings/valves used in water networks, connection details, directional drill method, detailing of structures like sewer maintenance &amp; drop holes, outfalls, etc.· Design development from feasibility studies, optioneering and detailed designs, preparation of technical reports, understanding of hydraulic modelling to enable challenge of model developed solutions and the co-ordination of the multidisciplinary teams· Apply relevant Design Standards, British Standards and Eurocodes in the design of buried pipework and other network ancillaries (e.g. thrust blocks, pumping stations &amp; maintenance holes &amp; chambers)· Prepare topographic/utility survey briefs and be able to understand the applicability of specific tools and techniques such as Laser scanning, drone survey and check output deliverables, good understanding of different surveys like Ground Penetrating Radar (GPR), Trial hole, borehole, Ecology, Environmental, Trees etc. and understanding the usage in design stage· Ability to read drawings, undertake pressure and gravity network model reviews in Civil 3D, produce clear and concise design sketches to be incorporated into a 3D model· Design and layout of Pump stations, verification of pump station model prepared in Revit would be added advantage· Working alongside our BIM team to develop 2D &amp; 3D (where appropriate) designs and proving input into modelling· Ensure that the technical content of all work is carried out in accordance with the agreed timescales and budgets and with better quality· Liaise and maintain good working relationships with the project team, internal stakeholders, client, contractors and third parties· Experience in working in Common Data Environment (ProjectWise, BIM 360, ACC)· Hands of experience on Hydraulic modeling (InfoWorks, MicroDrainage, WaterGEMS, SewerGEMS, Synergy) and designing software like Civil 3D, Revit, GIS will be added advantage· Working experience of CDM2015 and the duties therein· Ability to understand and implement the hierarchy of risk management in design.<h4>Qualifications</h4>· Master’s in Civil / Water Resources / Environment / PHE· 3-5 relevant experience is planning, designing and detailing of water assets· Good communication skills, and ability to work well independently at times· Able to see the “bigger picture” and take a birds-eye view of projects· Confident, with the ability to work either independently or as part of a team· Ability to work to deadlines and under pressure· Accountability for assigned work· Accuracy &amp; precision of work· Willingness to learn and develop· Excellent written and verbal communication skills· Strong critical thinking skills· Enthusiastic and Initiative-taking<h4>Additional Information</h4>AECOM provides a wide array of compensation and benefits programs to meet the diverse needs of our employees and their families. We also provide a robust global well-being program. We’re the world’s trusted global infrastructure firm, and we’re in this together – your growth and success are ours too. As an Equal Opportunity Employer, we believe in each person’s potential, and we’ll help you reach yours.#LI-FS1About AECOM AECOM is proud to offer comprehensive benefits to meet the diverse needs of our employees. Depending on your employment status, AECOM benefits may include medical, dental, vision, life, AD&amp;D, disability benefits, paid time off, leaves of absences, voluntary benefits, perks, flexible work options, well-being resources, employee assistance program, business travel insurance, service recognition awards, retirement savings plan, and employee stock purchase plan. AECOM is the global infrastructure leader, committed to delivering a better world. As a trusted professional services firm powered by deep technical abilities, we solve our clients’ complex challenges in water, environment, energy, transportation and buildings. Our teams partner with public- and private-sector clients to create innovative, sustainable and resilient solutions throughout the project lifecycle – from advisory, planning, design and engineering to program and construction management. AECOM is a Fortune 500 firm that had revenue of $16.1 billion in fiscal year 2024. Learn more at aecom.com. What makes AECOM a great place to work You will be part of a global team that champions your growth and career ambitions. Work on groundbreaking projects - both in your local community and on a global scale - that are transforming our industry and shaping the future. With cutting-edge technology and a network of experts, you’ll have the resources to make a real impact. Our award-winning training and development programs are designed to expand your technical expertise and leadership skills, helping you build the career you’ve always envisioned. Here, you’ll find a welcoming workplace built on respect, collaboration and community - where you have the freedom to grow in a world of opportunity. As an Equal Opportunity Employer, we believe in your potential and are here to help you achieve it. All your information will be kept confidential according to EEO guidelines. <h4>Experience Level</h4>Senior Level

Aecom India Pvt Ltd

Junior Engineer

Electromagnetic ANSYS-MAXWELL Professional L&amp;T Technology Services is hiring Electromagnetic ANSYS-MAXWELL Professional for our Vadodara location.Experience-10-16 Years Description<ul><li>Hands on experience on High frequency and Low frequency electromagnetic simulation.</li><li>Electrostatic analysis for capacitance analysis, Creepage and Clearance of electrical products.</li><li>Electromagnetic analysis for Electric motors and actuators, inductor, coil, etc.</li><li>High Frequency simulation for EMI, EMC analysis</li><li>Battery Modelling and analysis for Electric vehicle system level simulation. Pre processing and Post Processing in COMSOL, ANSYS Maxwell, ALTAIR FLUX</li><li>Excellent communication skills to discuss the project with its stakeholder</li></ul> Required Skill: ELECTROMAGNETICS, ELECTROSTATICS, COMSOL, ANSYS-MAXWELL, HFSS, ALTAIR-FLUX, FEKO

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