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Silicon Networking RTL Design Senior Engineer, Google Cloud<h4>Minimum qualifications:</h4><ul><li>Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.</li><li>8 years of experience in ASIC development with Verilog/SystemVerilog, VHDL.</li><li>Experience with ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).</li><li>Experience in micro-architecture and design of IPs and subsystems in Networking domain such as packet processing, bandwidth management, congestion control, etc.</li></ul> <h4>Preferred qualifications:</h4><ul><li>Experience with scripting languages (e.g., Python or Perl).</li><li>Experience in SoC designs and integration flows.</li><li>Knowledge of high performance and low power design techniques.</li><li>Knowledge of bus architectures, fabrics/NoC, processor design, accelerators, or memory hierarchies.</li></ul><h4>About the job</h4>In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.In this role, you will be part of a team developing ASICs used to accelerate and improve traffic efficiency in data centers. You will collaborate with members of architecture, verification, power and performance, physical design, etc. to specify and deliver high quality designs for next generation data center accelerators. You'll solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.The ML, Systems, &amp; Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world. We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.<h4>Responsibilities</h4><ul><li>Own microarchitecture and implementation of complex IPs and subsystems in the Networking domain.</li><li>Work with Architecture, Firmware, and Software teams to drive feature closure and develop micro-architecture specifications. </li><li>Drive design methodology, libraries, debug, code review in coordination with other IPs Design Verification (DV) teams and physical design teams.</li><li>Identify and lead power, performance, and area improvements for the domains owned.</li></ul><h4>Experience Level</h4>Senior Level

Google India Pvt Ltd

Electronic Engineer

Linux Device Driver Developer Capgemini is hiring for Linux Device Driver Developer (LDD) can join in 30 Days, and possess the required skill set, apply to this job. Experience: 4- 10 years Key Requirements:1. 3-5 Yrs of experience in Embedded Linux Kernel/Drivers domain2. Embedded Software development and porting on Linux and ARM platforms3. Strong Programming skills on C &amp; Data Structures4. Expertise on OS (Memory Mgmt, Scheduling, IPC, Multi-threading/processing)5. Experience in Linux Kernel/Device Drivers6. Proficiency in debugging embedded systems, including using tools like JTAG7. Understanding of System architecture and debugging at a system level. Please send your resume with the following details:Subject Line: Job Application- LDD (Linux Device Drivers)Name:Total Exp:Rel exp:Current CTC:ECTC:Current location:Are you willing to relocate?Notice period/ LWD:

Capgemini

Linux Engineer

Principal Hardware Development Engineering<h4>Company Description</h4>Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.<h4>Job Description</h4>We are seeking a Principal Hardware Development Engineer to join our innovative team in Bangalore , India. In this l role, you will drive the development of cutting-edge hardware solutions, guiding projects from concept to production.<ul><li>Lead and mentor a team of hardware engineers, fostering innovation and technical excellence</li><li>Develop and implement hardware architecture strategies aligned with product roadmaps</li><li>Oversee the entire hardware development lifecycle, from initial concept to mass production</li><li>Collaborate with cross-functional teams to ensure seamless integration of hardware and software components</li><li>Conduct technical reviews and provide expert guidance on complex hardware design challenges</li><li>Establish and maintain best practices for hardware development processes and methodologies</li><li>Evaluate new technologies and components to enhance product performance and competitiveness</li><li>Manage relationships with key vendors and external partners</li><li>Contribute to intellectual property development and patent applications</li></ul><h4>Qualifications</h4><ul><li>Master's degree in Electrical Engineering or related field with 10+ years of experience in hardware development and leading complex projects</li><li>Advanced knowledge of hardware design principles, PCB design, and high-speed interfaces (e.g., PCIe, UFS, LPDDR)</li><li>Expertise in CAD tools, simulation software, and lab equipment (oscilloscope, TDR, VNA)</li><li>Strong understanding of electrical engineering principles and manufacturing processes</li><li>Proven ability to lead and mentor engineering teams, with excellent project management skills</li><li>Outstanding analytical, problem-solving, communication, and interpersonal skills</li><li>Experience in product lifecycle management and semiconductor/consumer electronics industry preferred</li><li>Ability to adapt to rapidly changing technologies and market demands</li></ul><h4>Additional Information</h4>Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at <a href="mailto:jobs.accommodations@sandisk.com">jobs.accommodations@sandisk.com</a> to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.<h4>Experience Level</h4>Senior Level

SanDisk India Device Design Centre Pvt.Ltd

Associate Hardware Engineer

CATIA DMU Technical Lead Job Description-&nbsp;Cabin, MSI, ESI, Catia 3D /2D/ F3DPosition&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;: Technical Lead (2B)Experience&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;: 6 to 8 yearsPrimary Skills : Cabin, MSI, ESI, AIRBUS PMT ( CATIA V5, VPM, Trend, Full 3D etc.), DMU knowledge, Configuration Management basicsEducation: B.E./ B.Tech. (Aeronautical, Mechanical) Roles and Responsibilities<ol><li>3D Model &amp; Assembly checks in aircraft DMU &amp; against set of requirements</li><li>2D Drawing checks against set of requirements</li><li>3D model &amp; assembly design, compilation and integration</li><li>Interface alignment</li><li>2D Drawing creation (Interface, specification and installation drawings)</li><li>Full 3D Dataset compilation</li><li>Equipment steering</li><li>Operational configuration management</li><li>Functional electrics (PD, WD, FD creation and modification)</li><li>Creation and modification of customized specifications</li><li>2D to 3D conversion</li><li>Responsible for performing DMU(Digital Mock-up) Integration, design and F3D activities using AIRBUS&nbsp;methodologies.</li><li>Full 3D experience in Cabin , ESI and MSI</li><li>Good experience in DMU QC0, QC1, QC2 activities</li><li>A good team member who is responsible for supporting AIRBUS projects in DMU/M&amp;T bundles</li><li>Accountable for activity execution, closing of assigned responsibilities/activities and capable of keeping effective communication with all the stakeholders</li><li>Capture best practices, build knowledge repository &amp; training materials to train new team members added into the project team</li><li>Proactive in idea generation, innovation mindset to improve product, process methods and tools</li><li>Create quick PoC (Proof of Concepts) or build new solution proposal for various platforms</li></ol> Detailed Candidate Profile / Required Skills:<ol><li>Must have minimum of 6+ years of experience in AIRBUS&nbsp;Process, Methods and Tools and Full 3D.</li><li>Hands on experience in CATIA V5/V6, PASS SSI, Enovia VPM, TreND, Context Builder, CADint, Taksy, Gilda, DPDS and Optegra will be preferred.</li><li>Hands on experience in 3DExperience platform (functional) would be an advantage.</li><li>Sound knowledge in AIRBUS&nbsp;product structure and Configuration management process.</li><li>Should have a good technical knowledge of Aircraft Structures, Systems, Cabin &amp; Cargo Layouts.</li><li>Experience in Design and Quality check of AIRBUS Structural, Systems and Cabin/Interior components will be preferred.</li><li>Prior experience in SA and A350 projects and knowledge in AIRBUS functional tool testing environments would be preferred.</li><li>Preferable to have basic knowledge in Agile / SAFe methodologies.</li><li>Ability to work with cross-functional teams, flexible and agile enough to meet the expected deliverables to achieve common business goals &amp; objectives.</li><li>Very good communication, good interpersonal skills (excellent attitude to collaborate, support each other, willingness to learn from all and to develop relationships with team members, customers and all stakeholders) and create positively thriving environment within the team/organization</li></ol> QualificationsB Tech , BE

Sopra Steria India Limited

Technical Team Lead

C++ Module Lead Job Description<ul><li>Good experience in UI Modelling Language QML and its integration with QT for user interface.</li><li>Should have experience in C++ and Object-oriented design.</li><li>Added advantage on having experience in SAFe Agile process, Git and Jenkins.</li><li>working experience in Linux</li><li>Works collaboratively with agile team to implement and deliver quality solutions for applications with good user interface.</li><li>Designs software components and modules using appropriate modelling techniques following agreed software design standards, patterns, and methodology.</li><li>Must have excellent communication skills.</li><li>Should be able to lead team technically.</li></ul> Total Experience Expected: 04-06 years Qualifications:B.Tech

Software Development Engineer

GPU ArchitectNVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel.NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world!What you'll be doing:<ul><li>Performance analysis/ bottleneck analysis of complex, high performance GPUs and System-on-Chips (SoCs).</li><li>Work on hardware models of different levels of extraction, including performance models, RTL test benches and emulators, to find performance bottlenecks in the system.</li><li>Work closely with the architecture and design teams to explore architecture trade-offs related to system performance, area, and power consumption.</li><li>Understand key performance usecases or the product. Develop workloads and test suits targeting graphics, machine learning, automotive, video, compute vision applications running on these products.</li><li>Drive methodologies for improving turnaround time, finding representative data-sets and enabling performance analysis early in the product development cycle.</li><li>Develop required infrastructure including performance simulators, testbench components and analysis tools.</li></ul>What we need to see:<ul><li>BE/BTech or MS/MTech in relevant area, PhD is a plus.</li><li>2+ years of experience with exposure to performance analysis and complex system on chip and/or GPU architectures.</li><li>Demonstrated history of technical leadership.</li><li>Strong understanding of System-on-Chip (SoC) architecture, graphics pipeline, memory subsystem architecture and Network-on-Chip (NoC)/Interconnect architecture.</li><li>Expert hands on competence in programming (C/C++) and scripting (Perl/Python). Exposure to Verilog/System Verilog, SystemC/TLM is a strong plus.</li><li>Strong debugging and analysis (including data and statistical analysis) skills, including use for rtl dumps to debug failures.</li></ul>NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you're creative, autonomous and love a challenge, we want to hear from you. Come, join our Deep Learning Automotive team and help build the real-time, cost-effective computing platform driving our success in this exciting and quickly growing field.We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.​​#LI-Hybrid<h4>Experience Level</h4>Senior Level

Nvidia Graphics Pvt Ltd

CAD Engineer

Embedded Software Engineer What you’ll do:<ul><li>Design, program, debug, and test software in C++</li><li>Work on Linux embedded platforms (Yocto preferred)</li><li>Ensure quality using tools like Coverity/SonarQube</li><li>Create design docs, unit tests, and requirement analysis</li></ul> What we’re looking for:<ul><li>3–6 years of C++ software development</li><li>Experience with Git, agile practices &amp; strong problem-solving skills</li><li>Independent, self-motivated, and a great team player</li><li>Bonus: Knowledge of the medical domain</li></ul> Share your updated resume now.

Collabera

Embedded Software Developer

Full Stack Architect <ul><li>Lead innovation with Vue.js, Node.js, Python, and cloud-native tools like Docker, Kubernetes, Helm, and Kafka.</li><li>Build high-performance, scalable applications, design APIs, and manage multi-environment deployments.</li><li>Short joiners preferred</li></ul> Share your updated resume now.

Live Connections

Full Stack Engineer

Senior System Power and Performance Architect, Silicon<h4>Minimum qualifications:</h4><ul><li>Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.</li><li>8 years of experience with computer architecture, performance and power analysis.</li><li>Experience with Camera and GenAI workloads and dataflows.</li></ul> <h4>Preferred qualifications:</h4><ul><li>Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.</li><li>Experience with use case datapaths, IP-level and SoC-level performance KPIs and power management concepts.</li><li>Experience with Post-Signal Integrity (SI) power productization work.</li><li>Experience of software and architectural design decisions on system performance, power and thermal behavior.</li></ul><h4>About the job</h4>Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.<h4>Responsibilities</h4><ul><li>Architect and drive end-to-end low power solutions for Google Tensor mobile SoCs to optimize Power-Performance-Area (PPA) under battery life and thermal constraints. Special focus on camera and GenAI use cases, and other mobile apps developed by Google such as Chrome.</li><li>Create use case workload and data and control flow models for use case power, performance, thermal and DoU (days-of-use) evaluation to drive Hardware (HW) and Software (SW) architecture definitions.</li><li>Write code to develop simulators and models to evaluate mobile use cases.</li><li>Define power/performance KPIs, set SoC/IP-level power/performance targets, guide cross-functional teams to achieve these targets, perform use case level power roll-ups and track KPIs through the design cycle.</li><li>Drive power-performance what-if trade-off analysis to guide product roadmap and feature decisions.</li></ul><h4>Experience Level</h4>Senior Level

Senior System Engineer

Associate Electronics RF Design and Analysis EngineerAssociate Electronics RF Design and Analysis EngineerCompany:Boeing India Private LimitedOverview As a leading global aerospace company, Boeing develops, manufactures and services commercial airplanes, defense products and space systems for customers in more than 150 countries. As a top U.S. exporter, the company leverages the talents of a global supplier base to advance economic opportunity, sustainability and community impact. Boeing’s team is committed to innovating for the future, leading with sustainability, and cultivating a culture based on the company’s core values of safety, quality and integrity. Technology for today and tomorrowThe Boeing India Engineering &amp; Technology Center (BIETC) is a 5500+ engineering workforce that contributes to global aerospace growth. Our engineers deliver cutting-edge R&amp;D, innovation, and high-quality engineering work in global markets, and leverage new-age technologies such as AI/ML, IIoT, Cloud, Model-Based Engineering, and Additive Manufacturing, shaping the future of aerospace. People-driven cultureAt Boeing, we believe creativity and innovation thrives when every employee is trusted, empowered, and has the flexibility to choose, grow, learn, and explore. We offer variable arrangements depending upon business and customer needs, and professional pursuits that offer greater flexibility in the way our people work. We also believe that collaboration, frequent team engagements, and face-to-face meetings bring together different perspectives and thoughts – enabling every voice to be heard and every perspective to be respected.  No matter where or how our teammates work, we are committed to positively shaping people’s careers and being thoughtful about employee wellbeing.With us, you can create and contribute to what matters most in your career, community, country, and world. Join us in powering the progress of global aerospace. Position Overview Boeing India Engineering has an immediate opening for an Associate Electronics RF Design and Analysis Engineer to work in areas of RF design. This position offers a unique opportunity to work complex technical challenges in support of safety operation and return to service. This role will be based out of Bangalore, India. Position Responsibilities:<ul><li>Responsible for RF and mixed signal designs.</li><li>Design and simulate RF circuits for cellular modules including LNAs, filters, Diplexers, switching and matching networks.</li><li>Perform testing and validation of RF components and systems - RF amplifiers, filters, and antennas - to validate performance against specifications.</li><li>Perform RF validation, tuning, and debugging using tools such as VNA, spectrum analyzers, and signal generators</li><li>Perform simulation of filters and antenna synthesis using tools like Ansys HFSS</li><li>Perform circuit design, requirements and interface definition and design verification.</li><li>Design to meet EMI/EMC, safety and environmental compliance.</li><li>Develop and optimize RF systems supporting Wifi,4G LTE and 5G.</li><li>Execute testing of designs in Labs for functional, performance and stress environments apart from system integration  </li></ul>Basic Qualifications (Required Skills and Experience)<ul><li>Bachelor’s or Master’s Degree is required as a basic qualification in Electronics and Communication Engineering with 4 to 8 years of relevant experience. </li></ul>Preferred Qualifications (Desired Skills/Experience):<ul><li>Candidate should have experience in RF Design integration capabilities for Wireless communications and 5G integration</li><li>Candidate should have strong experience in high-speed design clocking, Ethernet/Serdes/MIPI designs</li><li>Candidate should have strong experience in knowledge of using simulation tools like SABER RD and creating simulation models with MATLAB and SABER</li><li>Candidate should have experience with Power Integrity analysis, Hyperlynx SI and Mentor suite of eCAD tools</li><li>Candidate should have basic knowledge of cellular and Wi-Fi standards</li></ul>Relocation:<ul><li>This position does offer relocation within INDIA.</li></ul>Language Requirements:Not ApplicableEducation:Bachelor's Degree or EquivalentRelocation:This position offers relocation based on candidate eligibility.Security Clearance:This position does not require a Security Clearance.Visa Sponsorship:Employer will not sponsor applicants for employment visa status.Contingent Upon Award ProgramThis position is not contingent upon program awardShift:Not a Shift Worker (India)<h4>Experience Level</h4>Mid Level

Boeing India Pvt Ltd

MBD + M-Scripting Engineer We’re Hiring: MBD + M-Scripting EngineerNotice period: Immediate to max 30 daysExperience: 3 – 6 Years We’re looking for MBD + M-Scripting Engineers with experience in any of the following:<ul><li>Design and development of interactive tools using MATLAB App Designer</li><li>Translating functional requirements into structured MATLAB applications and test cases</li><li>Integration of dynamic tables, charts, and plots into MATLAB GUIs</li><li>Regression testing across software releases</li><li>Workflow optimization and automation for performance enhancement</li><li>Hands-on experience in MATLAB development and M-scripting</li><li>Working knowledge of Python and/or C/C++</li><li>Strong problem-solving and debugging skills</li></ul> If interested, share your updated CV.

Design Engineer

GPU Design Verification Engineer<h4>Minimum qualifications:</h4><ul><li>Bachelor's degree in Mechanical Engineering, Electrical Engineering, Industrial Engineering or equivalent practical experience.</li><li>3 years of experience with standard GPU workloads like Manhattan/3DMark.</li><li>Experience with GPU architecture and AMBA Bus protocols like AHB/AXI/ACE.</li></ul> <h4>Preferred qualifications:</h4><ul><li>Master's degree or PhD in Electrical Engineering or Computer Science, or a related field.</li><li>Experience with performance verification of ASICs and Application-Specific Integrated Circuit (ASIC) components.</li><li>Experience with verification of low power techniques.</li></ul><h4>About the job</h4>Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.<h4>Responsibilities</h4><ul><li>Be part of a team to verify digital design blocks (e.g., CPU, Graphics Processing Unit (GPU), Image processor) by understanding the design specification and interacting with design engineers to identify important verification scenarios.</li><li>Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.</li><li>Identify and write all types of coverage measures for stimulus and corner-cases.</li><li>Debug tests with design engineers to deliver functionally correct design blocks.</li><li>Close coverage measures to identify verification holes and to show progress towards tape-out.</li></ul><h4>Experience Level</h4>Mid Level

Testing Engineer

Principal SoC Verification Engineer<h4>
 
 General Information
 </h4>






 Job Title
 

 Principal SoC Verification Engineer
 



 Job ID
 

 12625
 



 Country
 

 India
 



 City
 

 Noida
 



 Date Posted
 

 26-Aug-2025
 



 Job Category
 

 Engineering
 



 Job Subcategory
 

 SOC Engineering
 



 Hire Type
 

 Employee
 



 Remote Eligible
 

 No
 






<h4>
 
 Descriptions &amp; Requirements
 </h4>






 Job Description and Requirements
 

<h4 id="isPasted">We Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.We are at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we are powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation and SoC Design, we want to meet you.<h4> </h4><h4>You Are:</h4>You are a seasoned engineering professional with 12+ years of hands-on experience in SoC/IP/Subsystems verification, eager to make an impact at the principal level. You thrive in complex technical environments, bringing deep expertise in pre-silicon verification methodologies such as UVM, coverage analysis, and debugging. Your background in electronics engineering is complemented by a robust understanding of ASIC flows, design concepts, and industry protocols including PCIe, Ethernet, USB, and DDR.Leadership comes naturally to you—you guide and mentor teams, fostering growth and excellence, and you’re adept at managing verification activities for large-scale projects. You are a strategic thinker who anticipates challenges and proactively develops risk mitigation plans. Collaboration energizes you, whether working with architects, designers, or cross-functional teams to deliver high-quality solutions. Your communication skills are strong, allowing you to articulate complex technical details clearly to stakeholders and management.You are committed to continuous learning and growth, staying current with new verification tools and Synopsys technologies. Experience with ARM-based technologies, processor architecture, and debug systems further strengthens your profile. Above all, you are passionate about driving innovations in the semiconductor space and excited to help shape the future of smart systems through your expertise and leadership.<h4> </h4><h4>What You’ll Be Doing:</h4><ul><li>Engage with Synopsys customers to understand verification needs and define project scopes and deliverables.</li><li>Lead and mentor a team of engineers to execute pre-silicon verification activities on complex IPs and subsystems.</li><li>Develop verification plans, resource requirements, and risk mitigation strategies to ensure successful project execution.</li><li>Review results and reports, providing continuous feedback to enhance quality and efficiency.</li><li>Report status to management, offering insights and solutions for potential project challenges.</li><li>Collaborate with architects, designers, and pre/post-silicon teams to achieve verification goals.</li><li>Ramp-up on new verification tools and methodologies, leveraging Synopsys Products to enable customer success.</li><li>Work with business unit application engineers and sales teams to develop and deploy tool and IP solutions.</li><li>Drive improvements in verification methodology and execution efficiency across projects.</li><li>Ensure strict adherence to quality standards and best practices in design verification.</li></ul><h4> </h4><h4>The Impact You Will Have:</h4><ul><li>Accelerate customers’ SoC design cycles by delivering high-quality verification solutions.</li><li>Enhance Synopsys’ reputation as a trusted partner in solving complex verification challenges.</li><li>Enable successful product launches for customers in high-performance computing, automotive, aerospace &amp; defense, and more.</li><li>Drive innovation in verification methodologies, contributing to Synopsys’ leadership in EDA tools and IP.</li><li>Mentor and grow the capabilities of the verification team, fostering a culture of excellence and learning.</li><li>Improve project efficiency and execution through effective risk management and proactive problem-solving.</li><li>Strengthen cross-functional collaboration, ensuring seamless integration across design and verification teams.</li><li>Elevate the quality of deliverables, reducing post-silicon issues and increasing customer satisfaction.</li></ul><h4> </h4><h4>What You’ll Need:</h4><ul><li>B.E/B. Tech/M.E/M. Tech in electronics or related field, with a minimum of 12+ years’ experience in SoC/IP/Subsystems verification.</li><li>Expertise in pre-silicon verification: UVM, coverage analysis, verification plan creation, debugging, etc.</li><li>Strong knowledge of industry protocols (PCIe, Ethernet, USB, DDR) and processor/interconnect/debug architectures.</li><li>Hands-on experience with verification tools such as VCS, waveform analyzers, and third-party VIP integration (e.g., Synopsys VIPs).</li><li>Proven ability to lead teams and manage verification activities for complex SoC/IP/Subsystems projects.</li><li>Experience with ARM-based technologies (Coresight Debug, Processor architecture, etc.) is preferred.</li><li>Solid understanding of design concepts, ASIC flows, and stakeholder management.</li></ul><h4> </h4><h4>Who You Are:</h4><ul><li>Inspirational leader with a passion for mentoring and developing engineering talent.</li><li>Excellent communicator, able to articulate technical concepts to diverse audiences.</li><li>Proactive problem solver with strong organizational and analytical skills.</li><li>Collaborative team player, comfortable working in cross-functional and multicultural environments.</li><li>Detail-oriented and quality-focused, committed to delivering best-in-class solutions.</li><li>Adaptable and eager to learn new technologies, tools, and methodologies.</li></ul><h4> </h4><h4>The Team You’ll Be A Part Of:</h4>You’ll join the System Solutions Group (SSG), a dynamic team of experts delivering tool, methodology, architecture, design creation, verification, and physical implementation solutions for leading-edge customers. Our projects span from sub-blocks to full turnkey end-to-end SoCs, supporting startups, industry leaders, commercial entities, and government agencies. The team is dedicated to enabling customers to complete their most challenging SoC design projects in high-performance computing, automotive, aerospace, defense, and beyond.<h4> </h4><h4>Rewards and Benefits:</h4>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</h4>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.<h4>Experience Level</h4>Senior Level

Synopsys India Pvt Ltd

Embedded Systems Engineer

Senior Associate - Remote WindTech EngineerSenior Associate - Remote WindTech Engineer-ANA018630Ready to build the future with AI?  At Genpact, we don’t just keep up with technology—we set the pace. AI and digital innovation are redefining industries, and we’re leading the charge. Genpact’s AI Gigafactory, our industry-first accelerator, is an example of how we’re scaling advanced technology solutions to help global enterprises work smarter, grow faster, and transform at scale. From large-scale models to agentic AI, our breakthrough solutions tackle companies’ most complex challenges.If you thrive in a fast-moving, innovation-driven environment, love building and deploying cutting-edge AI solutions, and want to push the boundaries of what’s possible, this is your moment.Genpact (NYSE: G) is an advanced technology services and solutions company that delivers lasting value for leading enterprises globally. Through our deep business knowledge, operational excellence, and cutting-edge solutions – we help companies across industries get ahead and stay ahead. Powered by curiosity, courage, and innovation, our teams implement data, technology, and AI to create tomorrow, today. Get to know us at genpact.com and on LinkedIn, X, YouTube, and Facebook.Inviting applications for the role of a Senior Associate, Remote WindTech Engineer The ideal candidate will have an excellent balance of people, organizational, and technical skills, the role requires understanding of engineering drawings, service parts, spare parts, vibration analysis including prior knowledge of resolving electrical, mechanical, and hydraulic malfunctions. Previous experience in Inspecting, diagnosing, adjust, or repair of offshore wind turbines will be added advantage. The applicant should be willing to remotely work on heavy industrial machines across the globe which are generating millions of records and run 24X7. Responsibilities 1.    Case Management o    Monitor the 1st tier product support queue in ServiceNow and claim any unassigned cases that is in the queue o    Understand the need (s) of the case creator from a technical and admiration standpoint where the requestor need assistance / information o    Write the technical documentation to provide resolution / information to the requestor and resolve the case in ServiceNow o    Triage the case to concerned technical team if case requires additional inputs from other support team o    Manage the overall case Touch Time, Turn Around Time and closure of the case that is assigned.  Type of cases to be managed•    Updating data related to field contacts of wind farms in e-SCADA platform •    Correcting life census of wind turbines by connecting remote desktop of particular windfarm •    Creating and distributing special instructions developed by product engineering team to the field team and customers •    Creating and distributing daily and weekly wind farm health report by analyzing the data available on ServiceNow  •    End of warranty replacement / repair claims management by identifying the issues raised by customer and assigning the case to the correct technical group for resolution 2.    Technical Supporto    Monitor the 2nd tier product support queue in ServiceNow and claim any unassigned cases that is in the queue o    Understand the need (s) of the case creator from a technical standpoint where the requestor need technical product related assistance / information o    Write the technical documentation to provide resolution / information to the requestor and resolve the case in ServiceNow o    Triage the case to concerned technical team if case requires additional inputs from other support team o    Manage the overall case Touch Time, Turn Around Time and closure of the case that is assigned.  Type of cases to be managed•    Perform oil analysis by reviewing the oil sample reports with the plm document •    Gearbox torque arm pin displacement analysis by reviewing the data sheets received from the wind farms •    End Of Warranty analysis of  •    Correcting life census of wind turbines by connecting remote desktop of particular windfarm •    Reviewing the elastomer damper images to analyze the wear and tear on the component •    Listening the audio clip to analyze the damage on main rotor bearings •    Reviewing the cable images to identify damage category and estimating the remaining life cycle of the cables •    Reviewing the blade images to identify damage category and estimating the remaining life cycle of the cables •    Review the engineering drawing of the components to identify the part number and its quantity and specifications •    Study the lab report of oil to find out the contamination of iron available in main bearing oil lubricant 3.    Remote Monitoring of Vibration in Wind Turbineo    Monitor the 3rd tier product support queue in web based portal where events and anomalies from the wind turbines are triggered o    Write the technical recommendation to field engineers to perform inspection &amp; troubleshooting  to find root cause for events and anomalies to eliminate any downtime for the wind turbinesType of events and anomalies to be managed•    Data analysis to identify faults, determine severity, and write detailed reports on your findings •    Diagnose anomalies related to sensor location on the wind turbines generating faulty data •    Analyze and diagnose events related to sensor circuit values on the wind turbines generating faulty data  •    Analyze and diagnose events related to RPM and power generation on rated wind turbine data •    Resolve data quality issues of the wind farm to show correct number of wind turbines communicating to the wind server •    Vibration analysis on wind turbine components (main rotor bearing, gearbox and generator) by looking at trends, time wave form, spectrum and modes •    Configuration checks on newly added wind farms to ensure data processing to back-office tools •    Validate wind turbine performance after onsite troubleshooting by field engineer by looking at trends, time wave form, spectrum and modes and close the service eventQualifications Minimum qualifications •    B.E / B.Tech – Mechanical Engineering Technical Skills •    Proven experience, including certification of ISO Category I or equivalent, with machinery vibration analysis. •    Experience working with other predictive maintenance technologies and practices.Key competencies •    Strong communication skills; skilled at cross-functional and cross-organizational communication •    Attention to detail and good articulation skills. •    Ability to traverse both vertically and horizontally in a large organizationWhy join Genpact?  • Lead AI-first transformation – Build and scale AI solutions that redefine industries  • Make an impact – Drive change for global enterprises and solve business challenges that matter  • Accelerate your career—Gain hands-on experience, world-class training, mentorship, and AI certifications to advance your skills  • Grow with the best – Learn from top engineers, data scientists, and AI experts in a dynamic, fast-moving workplace  • Committed to ethical AI – Work in an environment where governance, transparency, and security are at the core of everything we  build  • Thrive in a values-driven culture – Our courage, curiosity, and incisiveness - built on a foundation of integrity and inclusion - allow your ideas to fuel progress  Come join the 140,000+ coders, tech shapers, and growth makers at Genpact and take your career in the only direction that matters: Up.  Let’s build tomorrow together.Genpact is an Equal Opportunity Employer and considers applicants for all positions without regard to race, color, religion or belief, sex, age, national origin, citizenship status, marital status, military/veteran status, genetic information, sexual orientation, gender identity, physical or mental disability or any other characteristic protected by applicable laws. Genpact is committed to creating a dynamic work environment that values respect and integrity, customer focus, and innovation. Furthermore, please do note that Genpact does not charge fees to process job applications and applicants are not required to pay to participate in our hiring process in any other way. Examples of such scams include purchasing a 'starter kit,' paying to apply, or purchasing equipment or training.  <h4 xmlns:ftl="http://www.taleo.net/ftl" xmlns:htm="http://www.w3.org/1999/xhtml" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">Job</h4> Senior Associate<h4 xmlns:ftl="http://www.taleo.net/ftl" xmlns:htm="http://www.w3.org/1999/xhtml" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">Primary Location</h4> India-Bangalore<h4 xmlns:ftl="http://www.taleo.net/ftl" xmlns:htm="http://www.w3.org/1999/xhtml" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">Schedule</h4> Full-time<h4 xmlns:ftl="http://www.taleo.net/ftl" xmlns:htm="http://www.w3.org/1999/xhtml" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">Education Level</h4> Bachelor's / Graduation / Equivalent<h4 xmlns:ftl="http://www.taleo.net/ftl" xmlns:htm="http://www.w3.org/1999/xhtml" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">Job Posting</h4> Sep 9, 2025, 1:12:22 PM<h4 xmlns:ftl="http://www.taleo.net/ftl" xmlns:htm="http://www.w3.org/1999/xhtml" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">Unposting Date</h4> OngoingMaster Skills List OperationsJob Category Full Time<h4>Experience Level</h4>Mid Level

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