SoC Logic Design Engineer

SoC Logic Design Engineer

Job Details:

Job Description: 

The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in developing and integrating logic designs into complex System-on-Chip (SoC) architectures. Your day-to-day efforts will focus on RTL coding, simulation, and quality checks to ensure designs meet power, performance, timing, and area targets. You will collaborate cross-functionally to validate design features and drive corrective actions, ensuring the highest standards of performance and reliability for Intel's cutting-edge technologies. Business group You will be part of Intel's Technology Development Group. As part of this team you will work on Foudnational IP TestChip designs that drive innovation and support Intel's broader mission to shape the future of technology. This group focuses on the development of advanced methodologies, tools, and design solutions for next-generation products, fostering collaboration and excellence across diverse technical domains. Key Responsibilities - Develop RTL designs and integrate logic components into SoC architectures. - Perform simulations and quality assurance checks to ensure design reliability and compliance with power, performance, area, and timing goals. - Collaborate with IP providers to integrate and validate IPs at the SoC level. - Review verification plans to ensure design features are thoroughly tested and implement corrective actions for failing RTL tests. - Optimize logic designs using advanced strategies, tools, and methods.

Qualifications:

Minimum Qualifications - Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 3+ years of relevant experience OR Master's degree with 2+ years of experience OR PhD with no prior professional experience. - Proficiency in RTL coding, logic design, and System Verilog. - Hands-on experience with digital design fundamentals and SoC integration. - Familiarity with scripting languages like Perl or TCL for design automation. Preferred Qualifications - Experience with timing/power convergence tools and methodologies. - Knowledge of design closure techniques for advanced technology nodes (e.g., 10nm or lower). - Exposure to synthesizable Verilog/System Verilog and simulation tools. - Strong analytical and problem-solving skills, coupled with clear and proactive communication. We invite you to bring your skills, curiosity, and passion for innovation to Intel and join a collaborative environment where your contributions will drive meaningful advancements in technology.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.