Senior Silicon Validation Engineer

Senior Silicon Validation Engineer

Overview

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for engineers to help achieve that mission.

#SCHIE

computer/electrical engineers to deliver premium-quality designs once considered impossible.   We are responsible for delivering cutting-edge AI designs that can perform complex and high-performance functions in an extremely efficient manner. 

We are looking for a Sr Validation Engineer with expertise in one or more of the following validation domains : functional, electrical, high speed interfaces, memory, power/performance, debug/BU and tool development.

You will be part of the Post-Silicon Validation team in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon Org.

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.  

In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day. 

Responsibilities

• Develop validation strategy, requirements, environments, tools, and methodologies including debug board and hardware/software requirements
• Apply your knowledge of validation principles and techniques and your judgement to write test plans and implement them by developing test content, scripts, tools, and other verification collateral
• Execute content in post-silicon, triage, and debug failures
• Apply your growth mindset to learn and adapt in a complex and dynamic environment
• Engage with partners to drive continuous improvement to design, validation plans/collateral, and methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably
• Provide technical guidance, coaching, and mentorship to other engineers in your areas of expertise
• Collaborate with and influence architects, logic designers, verification engineers, other post-silicon validators, and IP and tool providers
• Delight your customers by providing high quality results on schedule
• Provide technical leadership with respect and integrity
• Apply your expertise towards pre-silicon verification plans, tests, and debug of your area

Qualifications

• Candidate should have either a bachelor’s degree in Electrical or Computer Engineering with at least 7 years validation experience, or a master’s degree/Ph.D in Electrical or Computer Engineering with at least 5 years validation experience
• Applied understanding of Computer Architecture and SoC validation principles, including:
• Broad understanding of SoC subsystem, SoC system level, and platform level functionality
• Writing scripts/software with industry standard languages such as Python or C/C++.

• Leadership experience  driving Post-Silicon validation and characterization and successful execution

Preferred Requirements:

• Demonstrated success in running cross-disciplinary taskforces
• Verification, logic design or validation experience as part of a CPU, SoC and/or IP development team.
• Strong Leadership skills
• Experience with high-speed IO (ethernet, PCIe)
• Understanding of board level schematics

• Understanding of system level software and firmware
• Demonstrated success in hardware/software debug efforts
• Strong communication, collaboration and teamwork skills and ability to lead, grow, and contribute to diverse and inclusive teams
• Hands on expertise debugging silicon failures using on chip debug features (like trace or JTAG) as well as test equipment (like protocol analyzers, bit error rate testers, logic analyzers, high speed oscilloscopes)

This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.  As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their U.S. permanent residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

Experience Level

Senior Level