Senior Manager - VLSI IO Design Engineering

Senior Manager, VLSI Design Engineering ( IO Design (LVCMOS, HVCMOS, DDR, LVDS)) with 15+ Years of experience

Company Description

Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape.

 

Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.

 

Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.

Job Description

We're looking for an experienced Senior Manager, VLSI Design Engineering to join our organization in Bangalore, India. In this role, you will lead a team of talented design engineers and drive the development of cutting-edge semiconductor solutions. You will be responsible for overseeing the entire VLSI design lifecycle, from concept through production, while maintaining the highest standards of quality and innovation. The ideal candidate will combine deep technical expertise with strong leadership capabilities, demonstrating a detail-oriented and analytical approach to complex engineering challenges.

• Lead team of experienced IO Design Engineers
• Strategic development of next generation IO for scaling speed
• Build Best in Class IP Design
• Handling Business Unit communication on all IO Roadmap, RMA, FA
• Drive End-End IO Design capability and execution till Silicon to Productization
• Manage project timelines, budgets, and resource allocation while maintaining organizational objectives
• Drive innovation in VLSI design techniques and stay current with emerging technologies and industry trends
• Evaluate and recommend EDA tools and design automation solutions to improve team efficiency
• Perform power analysis and optimization to meet performance and energy efficiency targets
• Communicate technical progress and strategic recommendations to senior management and stakeholders

Qualifications

 

• Bachelors/Masters degree in Electronics & Telecommunication/Electrical engineering (VLSI Design)
• Extensive Hands-on design experience in IO Design (LVCMOS, HVCMOS, DDR, LVDS)
• 15+ years of Experience on handling IO designs, projects working with BU, Stake holders. 5+ years of leading a high performance team is desirable.
• NAND Flash Design knowledge is plus
• Expertise in ESD, Power bus, Floor plan, Layout guidelines
• Expertise, knowledge of advanced DDR algorithms: Training modes and DFE/CTLE/Compensation Techniques, Clock skew techniques
• Management and Lead experience to handle Team of IO engineers
• Experience in working with cross geo, cross team functions and stake holder management
• Expertise with package/board/Power integrity /signal integrity constraints is a plus.
• Strong communication skills & circuit design knowledge is preferred.
• Tool knowledge: spice tools: finesim, hspice & other flows
• Background in AI/ML chip design or emerging semiconductor technologies is a plus
• Experience coordinating with cross-functional teams including manufacturing, quality, and product engineering is desirable

Additional Information

All your information will be kept confidential according to EEO guidelines.

Experience Level

Senior Level