Senior Design Verification Engineer

Senior Engineer, Design Verification Engineering

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

          

Senior Design Verification Engineer

About the Team

The charter of ADI’s Consumer Audio team is to develop cutting edge products for hearables, hearing health and prosumer audio end markets. These products and technologies are a key driver of growth in our portable and prosumer consumer business.

Requirements

• Electronic Engineering/Computer Engineering degree with 5-8 years of progressive experience in digital design and verification.

• Must have demonstrated experience in developing UVM-based testbench infrastructure from ground up, functional cover point development, functional & code coverage analysis/closure and assertion development.

• Experience on both IP and SoC level verification with working knowledge of gate level simulations.

• Knowledge in AHB/AXI/APB protocols is desirable; Experience in Power aware simulations or Formal Verification is a big plus.

• Proficiency in Scripting languages and utilities including Makefile, Python, Perl etc.

• Must be a self-starter, should be able to work on assignments with minimal directions.

• Experience collaborating with product development groups spread across the globe is a must; should have strong interpersonal and communication skills.

Responsibilities

• Verification of key digital blocks in differentiated mixed signal SOCs targeted for the consumer market

• Complete verification ownership – Testbench Architecture, Testplan and Testbench Development, Functional Coverage Closure and Code Coverage Closure

• Usage of industry standard methodologies like UVM and constrained random approach to achieve verification goals

• Actively explore and deploy ML techniques to achieve faster turnaround time

• Debug efficiently and clearly articulate gating issues to engineering leads.

• Integrate the block level testbench at SOC level and verify SOC integration

• Involvement in post-silicon activities such as silicon bring-up, evaluation support, ATE pattern bring-up to take SoC into production.

Additional Qualifications & Experience:

• Digital Signal Processing concepts, and tools such as MATLAB or Octave

• Experience with HW emulation or FPGA prototyping is a plus

Why You'll Love Working Here
At Analog Devices, you'll be part of a collaborative and innovative team that's shaping the future of technology. We offer a supportive environment focused on professional growth, competitive compensation and benefits, work-life balance, and the opportunity to work on cutting-edge projects that make a real impact on the world.
You'll have access to continuous learning opportunities and mentorship from industry experts. Join us and help create the technologies that bridge the physical and digital worlds, making a tangible difference in how people live, work, and connect.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: 1st Shift/Days

Experience Level

Senior Level