ASIC Digital Design, Staff Engineer

Alternate Job Titles:

• ASIC Verification Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, enabling everything from self-driving cars to advanced learning machines. As the global leader in EDA tools, semiconductor IP, and silicon engineering solutions, we empower the creation of the world’s most advanced chips across AI/ML, high-performance computing, automotive, cloud, and mobile applications. Within our division, we develop and deliver interface subsystems that power industry-leading SoCs. Join us to transform the future through continuous technological innovation and world-class engineering excellence.

You Are:

You are an enthusiastic engineer who thrives at the intersection of various interface IPs. With a keen analytical mindset and a collaborative spirit, you are motivated by solving complex technical challenges that drive the future of connectivity. You are ready to deepen your expertise; you are excited by the opportunity to work on advanced UCIe/Ethernet/UALink IP integration deployed in the most innovative SoCs. You value not only technical mastery but also teamwork, mentorship, and the continuous pursuit of innovation. Your curiosity leads you to understand various interface IPs, and you are meticulous in ensuring the highest standards of silicon performance. You are comfortable navigating the intricacies of simulation environments, debugging challenging issues, and collaborating with diverse teams across the globe. You bring a growth mindset and a commitment to excellence, eager to learn from industry leaders while also contributing your own insights to shape next-generation Subsystems. If you thrive in a fast-paced, high-impact engineering environment and are driven by a sense of ownership and technical rigor, you will find Synopsys Subsystem organization to be the ideal environment to accelerate your career and make a meaningful impact.

What You’ll Be Doing:

• Technically leading and driving ownership of critical areas of verification alongside a team of talented verification engineers.
• Defining, implementing, and tracking comprehensive verification test plans to ensure robust coverage and quality for Subsystem.
• Specifying, building, enhancing, and maintaining state-of-the-art Subsystem top-level UVM-based System Verilog testbenches, integrating RTL, behavioral models.
• Coding and debugging test cases, including the creation of complex checkers and assertions using System Verilog/UVM.
• Extracting and reviewing functional coverage (FC) and code coverage metrics to ensure quality metric goals are met.
• Managing regressions and contributing to the continuous improvement of verification strategies and test environments.
• Debugging and resolving simulation failures, ensuring root-cause analysis and timely solutions.
• Working closely with RTL designers and architects to ensure functional correctness.

The Impact You Will Have:

• Enable the successful verification and deployment of high-performance Subsystem in leading-edge SoCs worldwide.
• Drive quality that powers AI, automotive, cloud, and mobile applications at massive scale.
• Advance the state-of-the-art in AI assisted verification methodologies, influencing future verification flows and processes.
• Contribute to the early detection and resolution of critical design issues, reducing time-to-market and silicon re-spins
• Collaborate with a global team of experienced verification engineers, fostering knowledge sharing and professional growth.
• Enhance Synopsys’ reputation as the premier provider of high-speed connectivity IP Subsystem through engineering excellence and innovation.
• Bolster Synopsys' leadership in chip design by ensuring our IP verification methodologies set industry standards.

What You’ll Need:

• Bachelor's or Master's degree in electronics/electrical engineering or related field, with 8+ years’ experience in ASIC/FPGA Verification.
• Ability to debug and define robust verification strategies; experience mentoring is a plus for senior candidates.
• Demonstrated experience in technically leading a team, record of successful collaboration and stakeholder management.
• Proven expertise in developing System Verilog/UVM based test environments for complex ASIC designs.
• Advanced skills in developing and implementing rigorous test plans, checkers, assertions, and coding complex tests.
• Strong proficiency in extracting and analyzing verification metrics such as functional coverage and code coverage.
• Experience with interface protocols and IP design/verification processes; knowledge of UCIe/Ethernet/UALink is highly desirable.
• Hands-on experience in owning end-to-end verification deliverables for IPs, including planning, execution, DV metrics closure, and review/signoff.

Who You Are:

• Analytical and detail-oriented, with strong problem-solving and debugging skills
• Initiative-taking and driven to deliver high-quality results in a fast-paced environment.
• Seeking feedback, sharing knowledge, and mentoring others when possible.
• Collaborative leader who inspires and mentors team members to achieve their best.
• Analytical thinker with strong critical thinking skills and a commitment to quality.
• Exceptional communicator, able to bridge technical and non-technical stakeholders.
• Self-motivated and proactive, with a passion for continuous learning and professional development.
• Adaptable and resilient in the face of complex challenges and changing priorities.

The Team You’ll Be A Part Of:

You will join the Synopsys Subsystem team, a group of expert engineers at the leading edge of IP integration. The team works in close partnership with all interface IP groups, tools, methodology and architecture groups across North America, Europe, and Asia. Together, you drive engineering excellence and deliver high-impact Subsystem that powers the world’s most advanced silicon solutions. You will enjoy a collaborative, supportive environment where innovation, technical rigor, and teamwork are at the core of everything we do.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.