Lead Design Engineer - Software Development for Memory IP and SoC Validation

Lead design Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Requirement :

Design & develop Software for Memory IP silicon Bring up & Characterization; Provide required software support for customer SOC bring up.

Have experience in Software development, tools development role, firmware/validation tools development.

Working knowledge of JTAG, I2C, SPI, and other relevant communication protocols.

Good understanding of in silicon validation; debugging of SoC software issues

Skill:

Strong C/C++ programming skills

Proficient in Python, GNU Make, GIT

GUI development experience using C# & TK (or similar tool kits)

Deep understanding of computer systems, operating systems, and computer architecture

Ability/willing to write code close to the hardware, and debugging

Additional points:

- Candidate with 3 - 6 years of experience

- Hands on software development experience

- Willing to write code and test the software in Silicon lab environment

- Candidate with good software experience or embedded development experience will do

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Experience Level

Senior Level