Analog Devices India Pvt Ltd

Senior Principal System on Chip (SoC) Architect

Analog Devices India Pvt Ltd
Bengaluru/Bangalore
Not disclosed
Work from OfficeWork from Office
Full TimeFull Time
Min. 15 yearsMin. 15 years

Job Description

Sr. Principal SOC Architect

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).

          

Sr. Principal SOC Architect - Consumer

Team

The charter of ADI’s Consumer Audio team is to develop cutting edge products for hearables, hearing health and prosumer audio end markets. These products and technologies are a key driver of growth in our portable and non-portable consumer business.

Requirements

  • BE/MS in EE, CE, or related with 15–20 years in SoC architecture and/or technical leadership for hearables/ wearables/ audio ultra‑low‑power consumer / medical/ fitness devices.
  • Proven history of mixed‑signal SoCs development integrating AFEs, PMIC, and low‑power digital subsystems.
  • Experience in more than one of the following:
    • Analog/Mixed‑Signal: AFEs for mics/speakers/sensors, ADC/DAC architectures (SAR/ΣΔ), PLL/clocking, noise/jitter mitigation, layout‑aware design considerations.
    • Power: System power architecture, PMIC interaction, DVFS, multi‑domain power states, retention/isolation, leakage reduction, always‑on design.
    • Digital/Compute: DSP/CPU/MCU microarchitecture for audio/ML, memory hierarchy, bus/NoC design, QoS/latency guarantees, security primitives.
    • Audio & Sensors: ANC/beamforming fundamentals, audio quality metrics, PPG/IMU basics, and sensor fusion power/latency tradeoffs.
    • Standards/Stacks: Familiar with BLE/LE Audio, I²S/TDM/PDM, SoundWire; understanding codec chains (LC3, AAC, SBC) and voice pipelines.
  • Experience collaborating with customers and product development groups spread across the globe is a must; should have strong interpersonal and communication skills.
  • Systems thinking showcasing comfort balancing PPA with acoustics, human factors, RF coexistence, thermal, manufacturing, and cost.
  • Strong HW/SW co‑design mindset; experience guiding firmware policies for power state management and audio pipeline control.
  • Proficiency with MATLAB/Simulink, SystemC or transaction‑level modeling; power estimation; scripting (Python).
  • Data‑driven decision making with clear modeling assumptions and sensitivity analyses.

Responsibilities

  • Own end‑to‑end SoC architecture for hearables/wearables: sensor/analog front‑end → mixed‑signal → digital/compute → memory → power delivery → clocks → interfaces → security.
  • Translate product requirements (battery life, latency, SNR, ANC quality, thermal limits, size, cost) into SoC architecture, budgets, and roadmaps.
  • Write clear specs, conduct design reviews, and make data‑driven tradeoffs balancing PPA, schedule, and risk.
  • Define partitioning across die/tiles/3D IC/SiP/PoP with clear rationale for power, cost, yield, and schedule.
  • Select process nodes and options based on cost, leakage, variability, and long‑term supply.
  • Provide architectural leadership across analog, digital, RF, firmware, acoustics, product, test, and operations.
  • Set performance targets: SNR/THD+N, noise floor, linearity, dynamic range, CMRR/PSRR, jitter; validate via modeling and lab correlation plans.
  • Co‑optimize packaging, grounding, and isolation to minimize crosstalk, substrate noise, and coupled digital switching noise.
  • Architect compute for audio/voice/ML workloads: selection/partitioning of DSP/CPU/NN accelerators; fixed‑ vs floating‑point tradeoffs; memory hierarchy and scratchpad sizes.
  • Define low‑latency pipelines for ANC/beamforming/keyword spotting/echo cancellation with tight end‑to‑end latency and deterministic QoS.
  • Own security baseline (TRNG/PUF, secure boot, key storage, crypto accelerators) and always‑on domain for wake words/sensor fusion.
  • Mentor senior engineers; elevate design quality, docs, and reusable IP strategy.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: 1st Shift/Days

Experience Level

Senior Level

Job role

Work location
Work locationIndia, Bangalore, Nova
Department
DepartmentProduction / Manufacturing / Engineering
Role / Category
Role / CategoryManufacturing R&D
Employment type
Employment typeFull Time
Shift
ShiftDay Shift

Job requirements

Experience
ExperienceMin. 15 years

About company

Name
NameAnalog Devices India Pvt Ltd
Job posted by Analog Devices India Pvt Ltd

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