Senior Memory Design Engineer

Memory Design Engineer

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent the last couple of years working in CMOS circuit design, and somewhere along the way you realized that memory design is where the real challenge lives. Bitcells, sense amps, decoders, the stuff that has to work perfectly across voltage, temperature, and process corners because there is no room for error when you are designing the storage backbone of a chip.

You are comfortable sitting with a schematic in Cadence, running SPICE simulations, tweaking transistor sizes, and understanding why a read margin shifted when you changed one parameter. You do not need to know everything yet, but you ask the right questions and you learn fast. When a senior engineer explains a tradeoff between area and performance, you take notes and remember it three months later when it matters.

You work well with others. Layout teams, verification engineers, CAD folks, you know that good memory design is a team sport and you show up ready to collaborate. At Synopsys, you will work on real memory IP that ships in real products, and you will have the mentorship and tools to grow into the kind of engineer who owns that work end to end.

What You'll Be Doing

• Design and simulate embedded memory circuits including SRAM bitcells, sense amplifiers, and peripheral circuits using Cadence Virtuoso
• Support layout activities by working closely with layout engineers to ensure design intent translates into physical implementation
• Run characterization simulations across PVT corners to validate performance, power, and reliability metrics
• Debug circuit issues using waveform analysis and collaborate with senior engineers to identify root causes and implement fixes
• Participate in cross-functional design reviews with verification, CAD, and frontend teams to align on specs and timelines
• Document design decisions, simulation results, and technical tradeoffs in clear, reusable formats for team knowledge sharing
• Contribute to scripting efforts in Python, Perl, or C-Shell to automate repetitive simulation and data analysis tasks

The Impact You Will Have

• Your work will directly contribute to memory IP blocks that ship in high-performance SoCs used in AI, automotive, and mobile applications
• You will help reduce design cycle time by supporting efficient simulation and characterization workflows
• Your debugging and analysis will improve the quality and reliability of memory products used by customers worldwide
• You will build reusable design collateral and documentation that accelerates future projects
• Your collaboration with layout and verification teams will ensure first-pass silicon success
• You will grow technical depth that positions you to take on ownership of full memory compiler blocks in the future
• Your contributions will support Synopsys's reputation for delivering best-in-class memory IP solutions

What You'll Need

• Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a closely related field
• 1 to 3 years of hands-on experience in CMOS circuit design, ideally with exposure to SRAM, ROM, or Register File design
• Working knowledge of memory architectures, bitcell design, and basic analog circuit fundamentals
• Experience using Cadence Virtuoso or similar tools for schematic capture, simulation, and layout interaction
• Familiarity with SPICE-level simulation and ability to interpret waveforms and extract meaningful performance data
• Exposure to scripting languages like Python, Perl, or C-Shell is a strong plus
• Good written and verbal communication skills in English

Who You Are

• You can look at a simulation result that does not match expectations and methodically trace it back to the circuit or setup issue without getting stuck
• You are comfortable asking for help when you hit a wall, and you take feedback from senior engineers as a learning opportunity, not criticism
• You keep your work organized, whether that is naming simulation runs clearly, maintaining a design log, or tracking action items from meetings
• You can explain a technical concept like read margin or write assist to a teammate from a different discipline without losing them in jargon
• You are the kind of person who stays curious, you read papers, you ask why a design choice was made, and you want to understand the full picture
• You work well in a team setting where timelines matter and multiple people depend on your piece being ready on time

The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.