Senior Staff Research and Development Software Engineer - Mixed Signal Simulation

Sr Staff R&D Software Engineer - Mixed Signal Simulation

General Information

Job Title Sr Staff R&D Software Engineer - Mixed Signal Simulation Job ID 16956 Country India City Noida Date Posted 10-Apr-2026 Job Category Engineering Job Subcategory R&D Engineering Hire Type Employee

Descriptions & Requirements

Job Description and Requirements

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a seasoned engineer with a passion for pushing the boundaries of technology. With 6 - 15 years of experience, you bring a wealth of knowledge in software architecture. You excel in C/C++ software development, digital simulation, compiler optimizations and your strong background in design patterns, data structures, and algorithms sets you apart. Your expertise in Verilog, SystemVerilog, coupled with your experience in Unix/Linux platforms, makes you a valuable asset. You are well-versed in developer tools like gdb and Valgrind. Your analytical and problem-solving skills are top-notch, and you are always eager to learn and explore new technologies. As a highly enthusiastic and energetic team player, you are ready to go the extra mile to achieve success.

What You’ll Be Doing:

- Designing, developing, and troubleshooting core algorithms for simulation. 

- Collaborating with local and global teams to enhance performance for GLS, AMS simulation. 

- Engaging in pure technical roles focused on software development and architecture. 

- Utilizing your knowledge of digital simulation flows and EDA tools to drive innovation. 

- Leveraging your expertise in Verilog, SystemVerilog, and VHDL to develop cutting-edge solutions.

The Impact You Will Have:

- Driving technological innovation in chip design and verification. 

- Enhancing the performance and quality of simulation tools used globally. 

- Solving complex compiler optimizations problems to improve simulation performance. 

- Collaborating with cross-functional teams to achieve project milestones. 

- Pioneering new software architectures that set industry standards.

What You’ll Need:

- Strong hands-on experience in C/C++ based software development. 

- Deep understanding of design patterns, data structures, algorithms, and programming concepts. 

- Knowledge of ASIC design flow and EDA tools and methodologies. 

- Proficiency in Verilog, SystemVerilog, and VHDL HDL. 

- 6 + years of relevant EDA Software experience preferably in Simulation domain

Who You Are:

- Highly enthusiastic and energetic team player with excellent communication skills. - Strong desire to learn and explore new technologies. - Effective problem-solver with a keen analytical mind. - Experienced in working on Unix/Linux platforms. - Adept at using developer tools such as gdb and Valgrind.

The Team You’ll Be A Part Of:

You will be part of the team in Digital and Mixed Signal Simulation. You will work closely with both local and global teams to drive technological advancements and achieve project goals.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Experience Level

Senior Level