ASIC Physical Design, Staff Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an experienced and highly motivated ASIC Physical Design Engineer with a passion for technology and a knack for problem-solving. With over 5 years of relevant experience, you have honed your skills in state-of-the-art CAD tools and technologies, specifically ICC2/FC, ICV, and FinFet. You thrive in dynamic environments and are adept at handling crises with composure. Your excellent communication skills, both verbal and written, enable you to effectively collaborate with internal and external teams. You possess a strong desire to learn and explore new technologies, demonstrating excellent exploration and problem-solving skills. You are autonomous in your work, often guiding junior peers, and you bring innovative solutions to complex project challenges. Your ability to network with senior personnel and your awareness of project management issues make you a valuable asset to any team.

What You’ll Be Doing:

• Implementing DDR and HBM PHYs for customer ASICs and SOCs in the DDR and HBM PHY Hardening service line.
• Performing synthesis, physical design, verification, design for test, and ATPG.
• Contributing as a senior member of a design team or as a project design engineer working with both internal and external design teams.
• Providing regular updates to the manager and front ending to customer on project progress.
• Representing the organization on business unit and/or company-wide projects.
• Guiding more junior peers with aspects of their job and frequently networking with senior internal and external personnel in your area of expertise.

The Impact You Will Have:

• Enhancing the reliability and performance of DDR and HBM PHYs for customer ASICs and SOCs.
• Contributing to the success of complex projects through innovative problem-solving and technical expertise.
• Ensuring timely delivery of high-quality design solutions to our customers.
• Improving the efficiency and effectiveness of the design process through your autonomous judgment and technical knowledge.
• Strengthening Synopsys' position as a leader in chip design and verification through your contributions.
• Mentoring and guiding junior team members, fostering a collaborative and innovative team environment.

What You’ll Need:

• A minimum of 5+ years of related experience in ASIC Physical Design.
• Proficiency in state-of-the-art CAD tools such as DC, PT, ICC2/FC, and ICV.
• Experience with advanced technologies like FinFet.
• Strong problem-solving skills and the ability to autonomously resolve a wide range of issues.
• Excellent verbal and written communication skills.

Who You Are:

• An innovative thinker with a passion for technology and continuous learning.
• A collaborative team player who excels in a dynamic and fast-paced environment.
• A mentor and guide for junior team members.
• A strong communicator with the ability to network effectively with senior personnel.
• A composed and reliable professional who can handle risks and uncertainty with ease.

The Team You’ll Be A Part Of:

You will be part of an engineering team dedicated to implementing DDR and HBM PHYs for customer ASICs and SOCs. The team focuses on the DDR and HBM PHY Hardening service line, encompassing synthesis, physical design, verification, design for test, and ATPG. You will collaborate with both internal and external design teams, contributing to complex projects and driving technological innovation.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.