Principal Design for Testability (DFT) Engineer

Principal Engineer DFT

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Responsibilities will include, but are not limited to:

• Own DFT implementation, including scan, MBIST, LBIST (as applicable), boundary scan (JTAG), and test access architectures for mixed signal SOC’s/ designs.
• Drive DFT architecture definition early in the design cycle, ensuring alignment with SoC integration, floor planning, timing, power, and physical design constraints.
• Implement and integrate DFT logic at the block, subsystem, and full-chip levels, working closely with RTL and integration teams.
• Own DFT flow execution and signoff, including lint, CDC, DFT rule checks, ATPG readiness, and coverage closure.
• Collaborate with physical design teams to ensure DFT solutions are optimized for placement, routing, timing closure, and DRC/LVS signoff.
• Work closely with verification, product engineering, test, probe, and manufacturing teams to ensure testability, diagnosability, and smooth silicon bring-up.
• Support pre-silicon debug of DFT-related issues and assist with post-silicon bring-up and yield/debug analysis.
• Partner with CAD and methodology teams to define, improve, and standardize DFT flows across Analog-Mixed Signal SoC programs.

Required Experience

• Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or related field.
• 10+ years of proven experience in SoC design, DFT, or implementation for sophisticated digital ASICs or SoCs.
• Experience with scan insertion, MBIST/LBIST architectures, JTAG/boundary scan, and ATPG concepts.

Candidates for this position will have:

• Support pattern failures post silicon, ATE testing failure debug.
• Familiarity with full RTL-to-GDS SoC flows, including interaction between DFT, synthesis, STA, and physical design.
• Experience working with large, sophisticated SoCs involving multiple IPs and subsystems.
• Proficiency with industry-standard EDA tools from Siemens, Synopsys, and/or Cadence for DFT and implementation.
• Familiarity with scripting languages (Python, Tcl, Perl, etc.) for flow automation.
• Effective and compliant use of Micron‑approved AI tools to augment DFT activities, improve execution efficiency, and support continuous improvement.

About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.

To learn more, please visit micron.com/careers

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.   

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Experience Level

Senior Level