Senior Software Engineer, ML Compiler, Frameworks and Performance

Minimum qualifications:

• Bachelor's degree or equivalent practical experience.
• 5 years of experience with software development in C++ or Python programming languages.
• Experience in machine learning (ML) infrastructure development or ML performance engineering.

Preferred qualifications:

• Experience with ML compilers and their internals, experience writing compiler optimization passes.
• Experience with accelerator HW architectures (TPUs/GPUs).
• Experience with ML Inference frameworks such as vLLM, SG Lang, Pathways.
• Experience with ML frameworks such as TensorFlow, JAX, PyTorch, Keras.

About the job

Build and improve the next generation of ML Infrastructure at Google. Our team is part of the Core ML organization which is the central machine learning organization that provides ML software tools and hardware infrastructure to all the Google product areas and is driving ML excellence for Google and the world. From ML frameworks to performance debugging and tooling, from ML efficiency to applied ML, our team is involved in various aspects of AI and infrastructure that is pushing the ML frontier across all of Google.

Responsibilities

• Focus around driving continuous improvements to the machine learning software/hardware stack for Google first-party teams, and for Google Cloud Platform customers.
• Develop an intuitive understanding of various parts of Google’s ML training and serving stack with deep introspection across Frameworks (JAX, PyTorch), Accelerated Linear Algebra (XLA) and runtime stack.
• Identify opportunities to improve the efficiency of the ML workloads through insightful performance debugging for workloads and custom kernels and build solutions to deliver those improvements.
• Partner with other teams that own various parts of the ML stack to understand performance optimization use cases. Work with OSS ML inference frameworks such as TorchTPU, vLLM, SGLang to provide insights into performance bottlenecks.
• Support new and exciting ML paradigms (such as horizontal scaling for upcoming TPU chips) by making contributions across the stack and performance analysis tools.