Physical Design Engineer - Backend CPU Design

TFM and PPA Physical Design Engineer

Job Details:

Job Description: 

• Do you want to engineer the future? The ACE CPU team is powered by some of the brightest and most innovative minds in the industry and we need you. Intel has a vision to create and extend computing technology to connect and enrich the lives of every person. We are designing future generations of high-performance CPUs using the most advanced and innovative process technologies.
• If you are looking to grow and develop your skillsets while surrounded by highly motivated and knowledgeable teammates as TFM and PPA Physical Design Engineer in the CPU group, you will be responsible for Developing, debugging, and supporting tools, flows and methodologies covering backend physical design methodologies and flow automation for high performance blocks and full chip level using RTL2GDS standard cell level design techniques.
• Performing analysis of either synthesis, place-and-route, floor planning or signoff for static timing analysis on timing paths, formal equivalence verification, estimating power consumption, electrical rule checking, and circuit reliability to identify key issues.
• Working closely with design teams to understand and debug tool issues and constraints.
• Working with industry EDA vendors to build and enhance tool capabilities to design a high-speed, low-power synthesizable CPU.

Qualifications:

• You must possess a Masters Degree in Electrical or Computer Engineering with at least 6 or more years of experience in related field or a Bachelor's Degree with at least 8 years of experience.
• Technical Expertise in Synthesis, Placement, CTS, Post-Route Optimization and P and R tools (CDNS and SNPS).
• Preferred Qualifications: - Familiarity with Verilog/ VHDL - Tcl, Perl, Python scripting.
• Strong verbal and written communication skills

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.