Senior Research and Development Software Engineer

Staff R&D Software Engineer - VC Platform

General Information

Job Title Staff R&D Software Engineer - VC Platform Job ID 15026 Country India City Noida Date Posted 29-Jan-2026 Job Category Engineering Job Subcategory R&D Engineering Hire Type Employee Remote Eligible No

Descriptions & Requirements

Job Description and Requirements

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a passionate and detail-oriented engineering professional, excited by the challenge of solving complex problems at the intersection of hardware and software. With 4 to 10 years of hands-on software development experience, you have honed your skills in C++, data structures, and algorithms, and possess a strong foundation in electronic design automation (EDA) flows. Your experience with ASIC design methodologies, combined with proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL, empowers you to craft robust, scalable, and innovative solutions. You thrive in collaborative environments, working seamlessly with both local and global teams, and are motivated by the opportunity to contribute to state-of-the-art EDA tools.

You bring a quality-focused mindset and an innate drive for excellence, always seeking to make a tangible impact. You are adaptive and resilient, setting personal goals and working diligently towards them in dynamic and evolving environments. Your familiarity with scripting languages (Tcl, Perl) and development on Unix/Linux platforms further strengthens your technical arsenal. If you have exposure to GenAI technologies, you see it as a valuable asset and are eager to apply it in the EDA domain. Above all, you are self-motivated, disciplined, and ready to shape the future of chip design and verification technologies.

What You’ll Be Doing:

• Designing, developing, and troubleshooting the core VC-Static engine at the parser level, ensuring robustness and scalability.
• Architecting and implementing object models for Verilog, SystemVerilog, and VHDL constructs to support advanced EDA tool capabilities.
• Collaborating with cross-functional teams locally and globally to deliver seamless product integration and innovative features.
• Developing state-of-the-art EDA tools by creating new and innovative algorithms focused on electronic design automation.
• Contributing to the evolution of HDL parsers and maintaining high-quality production code on Unix/Linux platforms.
• Leveraging your expertise in C++, data structures, and algorithm analysis to solve performance and scalability challenges.
• Applying scripting skills in Tcl/Perl to automate workflows and enhance tool usability.

The Impact You Will Have:

• Drive advancements in core EDA technologies, enabling customers to achieve faster and more reliable chip design cycles.
• Enhance the capabilities and performance of Synopsys’ VC Platform, directly influencing industry-leading verification solutions.
• Empower semiconductor companies to deliver high-quality products through improved static verification and analysis.
• Facilitate the adoption of innovative methodologies and automation, reducing design errors and time-to-market.
• Contribute to the global reputation of Synopsys as a leader in EDA innovation and customer satisfaction.
• Mentor and collaborate with peers, fostering a culture of technical excellence and continuous learning.

What You’ll Need:

• 4 to 10 years of software development experience with a strong emphasis on C++ programming.
• Proficiency in data structures, algorithm analysis, and object-oriented design.
• Solid understanding of ASIC design flow and EDA tools/methodologies.
• Experience with Verilog, SystemVerilog, and VHDL hardware description languages.
• Hands-on experience with scripting languages such as Tcl and Perl in Unix/Linux environments.
• Familiarity with HDL parser development and production code deployment.
• Knowledge of GenAI concepts is a plus.

Who You Are:

• Self-motivated and self-disciplined, with a strong drive to achieve personal and team goals.
• Quality-focused, with a keen eye for detail and a commitment to delivering robust software solutions.
• Excellent problem-solving skills, able to tackle complex technical challenges with creativity and rigor.
• Collaborative and communicative, thriving in diverse, global teams and open to feedback and learning.
• Adaptable, proactive, and resilient in dynamic, fast-paced environments.

The Team You’ll Be A Part Of:

You will join a highly skilled and collaborative R&D team focused on developing and enhancing Synopsys’ VC Platform. The team is dedicated to advancing EDA technology through innovation, quality, and teamwork. You’ll work alongside experts in software engineering, hardware design, and verification, contributing to products that are critical to the success of the world’s leading semiconductor companies.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Experience Level

Senior Level