Senior Digital Design Engineer

Senior STA Engineer

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).

          

Position             : Senior STA Engineer

Experience        : 6+ years

Hiring Manager: Jaikishan Gopal

Education          : Bachelor/Masters engineering degree in Computer Science/Electrical/Micro-Electronics

Location             : Bangalore, India

Job Grade          : P3

Rssponsibilities:

• Lead and develop timing methodologies, establish SDC constraints, and automate processes for special timing checks, ensuring design convergence and managing ECOs effectively.
• Proficiency in performing static timing analysis (sign-off) for multi-corner, multi-voltage processes to align with PPA targets, at both block level and chip level, reviewing the timing arcs for the .lib generation.
• Be responsible for constraint development, validation at the block/subsystem/full chip level.
• Collaborate closely with Business Units and EDA vendors to ensure quality enhancements and address flow concerns thus enabling cutting edge signoff methodology.
• Implement power-saving strategies, such as power gating, multi-voltage domains, and clock gating, to meet low-power objectives while preserving performance standards.
• Create and refine custom scripts using Python, Tcl or Perl to enhance workflow efficiency and streamline Signoff design operations.
• Mentor and support junior design engineers, disseminating best practices and providing technical guidance to elevate team proficiency and performance.

Desired Skills:

• Proven ability in timing analysis, convergence, timing ECOs, and .lib generation on advanced technologies.
• Proficient in industry standard Static Timing Analysis tools using Cadence or Synopsys toolsets
• Understanding the timing requirements across Digital and Analog interfaces is a plus
• Excellent problem-solving, leadership, and communication skills and values team culture.
• Capable of thriving in fast-paced environments and good at multi-tasking.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: 1st Shift/Days

Experience Level

Senior Level