Globalfoundries Engineering Private Limited

Senior Staff Engineer - Design for Test (DFT)

Globalfoundries Engineering Private Limited
Bengaluru/Bangalore
Not disclosed
Work from OfficeWork from Office
Full TimeFull Time
Min. 8 yearsMin. 8 years

Job Description

Sr Staff Engineer DFT

The Principal DFT Engineer serves as a technical authority and strategic lead in designing and deploying industry-leading Design-for-Test (DFT) architectures. This role is responsible for the end-to-end DFT strategy for complex, high-performance SoCs—spanning architectural definition, advanced ATPG/MBIST/LBIST strategies, and silicon lifecycle management. You will drive innovation in test methodology to achieve world-class quality, minimize Test Cost (CoT), and ensure seamless transition from pre-silicon RTL to high-volume manufacturing (HVM).

About GlobalFoundries

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Your Job 

  • Architectural Leadership: Define and own the global DFT architecture, including Hierarchical Scan, Compressed ATPG, Memory BIST/Repair (BISR), Logic BIST, and IEEE 1687 (IJTAG) networks for multi-die or chiplet-based designs. 

  • Test Strategy Optimization: Develop advanced strategies for defect-oriented testing (Cell-aware, Slack-aware) and optimize pattern volumes to balance aggressive coverage targets with tester memory constraints. 

  • Cross-Functional Integration: Lead the integration of DFT requirements into RTL, Synthesis, and Physical Design (STA/PD) flows. Drive "Design for Manufacturability" (DFM) initiatives to improve yield. 

  • Silicon Bring-up & Debug: Spearhead post-silicon validation and silicon bring-up. Own the root-cause analysis of complex test failures and provide expert-level debugging of ATE/System-level failures. 

  • Methodology & Automation: Architect and maintain scalable, high-performance DFT flows using TCL, Python, or Perl. Evaluate and benchmark emerging EDA tool features to stay ahead of technology nodes (5nm/3nm and beyond). 

  • Mentorship & Influence: Provide technical mentorship to junior and senior engineers. Act as a consultant for verification and backend teams to resolve "bottleneck" timing or routing issues caused by DFT structures. 

  • Technical Documentation: Author comprehensive DFT specifications and strategy documents that serve as the "Gold Standard" for current and future project iterations. 

 

Other Responsibilities 

  • Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. 

 

Required Qualifications 

  • Education: Bachelor’s, Master’s, in Electrical Engineering, Computer Engineering, or related fields. 

  • Experience: 8+ years of hands-on DFT experience with a proven track record of successfully taping out multiple complex SoCs. 

  • Tool Mastery: Expert-level proficiency with industry-standard EDA suites (e.g., Synopsys TestMAX/DFTMAX, Cadence Modus, or Siemens/Mentor Tessent). 

  • Advanced Logic Knowledge: Deep understanding of scan compression architectures (EDT/Adaptive Scan), hierarchical DFT, and mixed-signal test integration. 

  • Scripting: Advanced proficiency in TCL and Python/Perl for developing custom CAD attributes and automating complex EDA flows. 

  • Problem Solving: Demonstrated ability to solve "showstopper" timing closure issues related to DFT or complex ATPG coverage gaps. 

Preferred Qualifications 

  • Specialized Flows: Experience with Automotive ASIL-D functional safety requirements, including In-System Test (IST) and periodic logic/memory monitoring. 

  • Yield Analysis: Experience with Volume Diagnostics and Yield Learning tools to drive DPPM reduction. 

  • Industry Presence: Active participation in technical conferences or a history of contributing to patented DFT innovations. 

GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard.

As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.

All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

Information about our benefits you can find here: https://gf.com/about-us/careers/opportunities-asia

 

Experience Level

Senior Level

Job role

Work location
Work locationIND - Karnataka - BANGALORE - MIPS, India
Department
DepartmentProduction / Manufacturing / Engineering
Role / Category
Role / CategoryManufacturing R&D
Employment type
Employment typeFull Time
Shift
ShiftDay Shift

Job requirements

Experience
ExperienceMin. 8 years

About company

Name
NameGlobalfoundries Engineering Private Limited
Job posted by Globalfoundries Engineering Private Limited

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