Qualification : BE/BTech, ME/MTech ( VLSI Domain ) • Strong knowledge and experience in Scan Insertion, TestKompression, ATPG, Memory BIST and JTAG at IC –level for mixed signal designs. • Experience in using Mentor DfT tools, Cadence RC and simulator tools • Define DfT Strategy and Requirement Specification for the design Skills: Experience :3 – 8 yrs (RTL to GDSII) Qualification : BE/BTech, ME/MTech ( VLSI Domain ) • Experience and Expertise in Synopsys or Cadence tools like DC-DCTopo, ICC2/Innovus, PTSI, Calibre/ICV Proficient in physical design methodology at Block Partition/Top level Floor planning, place and route, CTS, Timing and PV signoff • Proficient in Synthesis methodologies and flows, optimization techniques, area reduction techniques • Proficient in low power structures • Excellent in digital design fundamentals • Good debugging skills • Work with Top level team for closing CTS, IO timing. • Should have knowledge of low power techniques • Good understanding of physical design flows, flow automation and design data management. • Good overall scripting knowledge (Perl, TCL, shell scripts) • Good customer support skills across remote sites. • Strong communication skills (verbal and written). • Teamwork skills and the capability of managing a dynamic work environment Experience : 3 to 8 yrs Qualification : BE/BTech, ME/MTech ( VLSI Domain ) • Good understanding of Multi-processor and cache designs Hands on coding experience in Verilog/VHDL • Familiarity with various ARM AMBA protocols (e.g AXI, AHB etc) as well as cache coherency protocols • Has good knowledge on various tools viz Spyglass, 0-in,LEC etc • Working knowledge of timing closure is a plus Expertise in Perl, TCL language is a plus • DfT verification for gate-level and timing simulations .Work cross sites with design team to define and implement DfT. • Hands on experience in solving DfT problems, simulation failures, ATPG coverage and DRC improvements. • Support Test engineer in silicon debug and pattern delivery for ATE • Experience in RTL coding, shell scripting .Experienced in handling analog DfT

More about this Hardware & Network Engineer job

Smartcon Technologies is aggressively hiring for the job profile of Hardware & Network Engineer at Bengaluru in Kodigehalli locality. Kindly go through the FAQs below to get all answers related to the given job. 1. How much salary can I expect? Ans. You can expect a minimum salary of 50,000 INR and can go up to 60,000 INR. The salary offered will depend on your skills, experience and performance in the interview. 2. What is the eligibility criteria to apply for this job? Ans. The candidate should have completed Graduate degree and people who have 3 to 31 years are eligible to apply for this job. You can apply for more jobs in Bengaluru to get hired quickly. 3. Is there any specific skill required for this job? Ans. The candidate should have Good (Intermediate / Advanced) English skills and sound communication skills for this job. 4. What are the timings of the job and how many working days are there? Ans. It is a Full Time job having timing from 10:00 AM - 6:00 PM and will have 5 working days i.e., Monday to Friday. 5. Is it a work from home job? Ans. No, it’s not a work from home job and can’t be done online. You can explore and apply for other work from home jobs in Bengaluru at apna. 6. Are there any charges or deposits required while applying for the role or while joining? Ans. No work-related deposit needs to be made during your employment with the company. 7. How can I apply for this job? Ans. Go to the apna app and apply for this job. Click on the apply button and call HR directly to schedule your interview. 8. What is the last date to apply? Ans. The last date to apply for this job is 03-Jul-2021. For more details, download apna app and find Full Time jobs in Bengaluru. Through apna, you can find jobs in 74 cities across India. Join NOW!