Design Engineer

Specialization: DDR/LPDDR / Ethernet / USB

Job Summary:

We are seeking a skilled Design Verification (DV) Engineer with experience in high-speed interface protocols such as DDR/LPDDR and Ethernet/USB. The candidate will be responsible for verifying complex SoC/IP designs and ensuring high-quality silicon delivery.

Key Responsibilities:

- Develop and execute verification plans for IPs/SoCs

- Build and maintain UVM/SystemVerilog-based testbenches

- Perform functional verification of DDR/LPDDR / Ethernet / USB protocols

- Write test cases, debug failures, and ensure coverage closure

- Work closely with design and architecture teams to understand specifications

- Perform regression runs and analyze results

- Ensure compliance with industry standards and protocol specifications

Required Skills:

- Strong experience in SystemVerilog and UVM

- Hands-on experience in Design Verification (DV)

- Good understanding of:

 • DDR3/DDR4/LPDDR4/LPDDR5 protocols (for DDR role)

 • Ethernet (1G/10G/25G) or USB (2.0/3.0/Type-C) (for Interface role)

- Experience in debugging, coverage analysis, and assertions (SVA)

- Familiarity with simulation tools like VCS, Questa, or Xcelium

Preferred Qualifications:

- Bachelor’s/Master’s in Electronics / VLSI / ECE

- Experience in SoC/IP level verification

- Knowledge of scripting languages (Python/Perl)

- Exposure to formal verification is a plus